CS8420 datasheet(65/80 Pages) CIRRUS

65 / 80 page

CS8420

DS245PP2

14.6.1

Pin Description - Hardware Mode 5

Overall Device Control:

DFC0, DFC1 - Data Flow Control Inputs

DFC0 and DFC1 inputs determine the major data flow options available in hardware mode, according to

Table 3.

S/AES - Serial Audio or AES3 Input Select

S/AES is connected to DGND in hardware mode 5, in order to select the AES3 input.

OMCK - Output Section Master Clock Input

Output section master clock input. This pin is not used in this mode and should be connected to DGND.

Audio Output Interface:

SDOUT - Serial Audio Output Port Data Output

Audio data serial output pin. This is also a start-up option pin, and requires a pull-up or pull-down

resistor.

OSCLK - Serial Audio Output Port Bit Clock Input or Output

Serial bit clock for audio data on the SDOUT pin.

OLRCK - Serial Audio Output Port Left/Right Clock Input or Output

Word rate clock for the audio data on the SDOUT pin. The frequency will be at the input sample rate

(Fsi).

AES3/SPDIF Receiver Interface:

RXP, RXN - Differential Line Receiver Inputs

Differential line receiver inputs, carrying AES3 type data.

RMCK - Input Section Recovered Master Clock Output

Input section recovered master clock output. Will be at a frequency of 256x the input sample rate (Fsi).

CS8420 Datasheet(PDF) 65 Page - Cirrus Logic