CS8420 datasheet(72/80 Pages) CIRRUS

72 / 80 page

CS8420

DS245PP2

16.

APPENDIX B: CHANNEL STATUS

AND USER DATA BUFFER

MANAGEMENT

The CS8420 has a comprehensive channel status

lows automatic management of channel status

blocks and user data. Alternatively, sufficient con-

trol and access is provided to allow the user to com-

pletely manage the C and U data via the control

port.

16.1

AES3 Channel Status(C) Bit

Management

The CS8420 contains sufficient RAM to store a full

block of C data for both A and B channels (192x2

= 384 bits), and also 384 bits of U information. The

user may read from or write to these RAMs via the

control port.

Unlike the audio data, it is not possible to ’sample-

rate’ convert the C bits. This is because specific

meanings are associated with fixed-length data pat-

terns, which should not be altered. Since the output

data rate of the CS8420 will differ from the input

rate when sample-rate conversion is done, it is not

feasible to directly transfer incoming C data to the

output. The CS8420 manages the flow of channel

status data at the block level, meaning that entire

blocks of channel status information are buffered at

the input, synchronized to the output timebase, and

then transmitted. The buffering scheme involves a

cascade of 3 block-sized buffers, named D,E and F,

as shown in Figure 39. The MSB of each byte rep-

resents the first bit in the serial C data stream. For

example, the MSB of byte 0 (which is at control

port address 32) is the consumer/professional bit

for channel status block A.

The first buffer, D, accepts incoming C data from

the AES receiver. The 2nd buffer, E, accepts entire

blocks of data from the D buffer. The E buffer is

also accessible from the control port, allowing read

and writing of the C data. The 3rd buffer (F) is used

as the source of C data for the AES3 transmitter.

The F buffer accepts block transfers from the E

buffer.

If the input rate is slower than the output rate (so

that in a given time interval, more channel status

blocks are transmitted than received), some buff-

ered C blocks will be transmitted multiple times. If

the input rate is faster than the output rate, some

will not be transmitted at all. This is illustrated in

Figure 40). In this manner, channel status block in-

tegrity is maintained. If the transmitted sample

count bits are important in the application, then

they will need to be updated via the control port by

the microcontroller for every outgoing block.

16.1.1

Manually accessing the E buffer

The user can monitor the data being transferred by

reading the E buffer, which is mapped into the reg-

ister space of the CS8420, via the control port. The

user can modify the data to be transmitted by writ-

ing to the E buffer.

Control Port

From

AES3

Receiver

AES3

Transmitter

words

8-bits

Received

Data

Buffer

Transmit

Data

Buffer

Figure 39. Channel Status Data Buffer Structure

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