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GL850 Datasheet(PDF) 14 Page - List of Unclassifed Manufacturers |
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GL850 Datasheet(HTML) 14 Page - List of Unclassifed Manufacturers |
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14 / 40 page ![]() GL850 USB 2.0 4-Port HUB Controller ©2000-2003 Genesys Logic Inc.—All rights reserved. Page 14 Clock and Reset Interface Pin# Pin Name Type Description 20 XTAL1 I 12MHz crystal clock input. 21 XTAL2 O 12MHz crystal clock output. 38 RESET# I Active low. External reset input, default pull high 100KΩ. When RESET# = low, whole chip is reset to the initial state. System Interface Pin# Pin Name Type Description 39 TEST I (pd) 0: Normal operation. 1: Chip will be put in test mode. Power / Ground Pin# Pin Name Type Description 11,18, 22,28, 63,64 AVDD P Analog power input for analog circuits. 1,12,19, 23,29, 62 AGND P Analog ground input for analog circuits. 37,47, 52,59 DVDD P Digital power input for digital circuits. 36,46, 51,58 DGND P Digital ground input for digital circuits. Note: Analog circuits are quite sensitive to power and ground noise. PCB layout must take care the power routing and the ground plane. For detailed information, please refer to GL850 Design Guideline. Notation: Type O Output I Input B Bi-directional B/I Bi-directional, default input B/O Bi-directional, default output P Power / Ground A Analog SO Automatic output low when suspend pu Internal pull up pd Internal pull down odpu Open drain with internal pull up |
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