PM5347 datasheet(228/302 Pages) PMC

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PM5347 S/UNI-PLUS

DATA SHEET

PMC-941033

ISSUE 6

SATURN USER NETWORK INTERFACE PLUS

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

212

Bit

Type

Function

Default

Bit 7

R/W

TT_BYP

Bit 6

Unused

Bit 5

PMCATST

Bit 4

PMCTST

Bit 3

DBCTRL

Bit 2

R/W

IOTST

Bit 1

HIZDATA

Bit 0

R/W

HIZIO

This register is used to enable S/UNI-PLUS test features. All bits, except

PMCTST and PMCATST, are reset to zero by a reset of the S/UNI-PLUS.

HIZIO, HIZDATA:

The HIZIO and HIZDATA bits control the tri-state modes of the S/UNI-PLUS .

While the HIZIO bit is a logic one, all output pins of the S/UNI-PLUS except

the data bus and output TDO are held tri-state. The microprocessor interface

is still active. While the HIZDATA bit is a logic one, the data bus is also held in

a high-impedance state which inhibits microprocessor read cycles. The

HIZDATA bit is overridden by the DBCTRL bit.

IOTST:

The IOTST bit is used to allow normal microprocessor access to the test

registers and control the test mode in each TSB block in the S/UNI-PLUS for

board level testing. When IOTST is a logic one, all blocks are held in test

mode and the microprocessor may write to a block's test mode 0 registers to

manipulate the outputs of the block and consequentially the device outputs

(refer to the "Test Mode 0 Details" in the "Test Features" section).

DBCTRL:

The DBCTRL bit is used to pass control of the data bus drivers to the CSB

pin. When the DBCTRL bit is set to logic one and either IOTST or PMCTST

are logic one, the CSB pin controls the output enable for the data bus. While

the DBCTRL bit is set, holding the CSB pin high causes the S/UNI-PLUS to

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