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PM5347 Datasheet(PDF) 274 Page - PMC-Sierra, Inc |
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PM5347 Datasheet(HTML) 274 Page - PMC-Sierra, Inc |
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274 / 302 page ![]() PM5347 S/UNI-PLUS DATA SHEET PMC-941033 ISSUE 6 SATURN USER NETWORK INTERFACE PLUS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 258 4. Microprocessor Interface timing applies to normal mode register accesses only. 5. In non-multiplexed address/data bus architecture's, ALE should be held high, parameters tSALR, tHALR, tVL, tHLR and tSLR are not applicable. 6. Parameter tHAR is not applicable if address latching is used. 7. When a set-up time is specified between an input and a clock, the set-up time is the time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of the clock. 8. When a hold time is specified between an input and a clock, the hold time is the time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of the clock. Table 15 - Microprocessor Interface Write Access (Figure 36) Symbol Parameter Min Max Units tSAW Address to Valid Write Set-up Time 10 ns tSDW Data to Valid Write Set-up Time 20 ns tSALW Address to Latch Set-up Time 10 ns tHALW Address to Latch Hold Time 10 ns tVL Valid Latch Pulse Width 20 ns tSLW Latch to Write Set-up 0 ns tHLW Latch to Write Hold 5 ns tHDW Data to Valid Write Hold Time 5 ns tHAW Address to Valid Write Hold Time 5 ns tVWR Valid Write Pulse Width 40 ns |
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