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PM5347 Datasheet(PDF) 143 Page - PMC-Sierra, Inc |
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PM5347 Datasheet(HTML) 143 Page - PMC-Sierra, Inc |
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143 / 302 page ![]() PM5347 S/UNI-PLUS DATA SHEET PMC-941033 ISSUE 6 SATURN USER NETWORK INTERFACE PLUS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 127 Register 0x2A: SSTB Indirect Address Register Bit Type Function Default Bit 7 R/W RWB 0 Bit 6 R/W A[6] 0 Bit 5 R/W A[5] 0 Bit 4 R/W A[4] 0 Bit 3 R/W A[3] 0 Bit 2 R/W A[2] 0 Bit 1 R/W A[1] 0 Bit 0 R/W A[0] 0 This register supplies the address used to index into section trace identifier buffers. A[6:0]: The indirect read address bits (A[6:0]) are used to address the section trace identifier buffers. When RRAMACC is set high, addresses 0 to 63 reference the captured message page while addresses 64 to 127 reference the expected message page of the receive section trace buffer. The captured message page contains the identifier bytes extracted from the receive stream. The expected message page contains the section trace message to which the captured message page is compared. When RRAMACC is set low, addresses 0 to 63 reference the transmit section trace buffer which contains the section trace message inserted in the transmit stream. RWB: The access control bit (RWB) selects between an indirect read or write access to the selected section trace buffer (receive or transmit as determined by the RRAMACC bit). Writing to this register initiates an access to the selected section trace buffer. When RWB is a logic one, a read access is initiated. The addressed location's contents are placed in the SSTB Indirect Data register. When RWB is a logic zero, a write access is initiated. The data in the SSTB Indirect Data register is written to the addressed location in the selected buffer. |
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