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PM5347 Datasheet(PDF) 147 Page - PMC-Sierra, Inc |
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PM5347 Datasheet(HTML) 147 Page - PMC-Sierra, Inc |
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147 / 302 page ![]() PM5347 S/UNI-PLUS DATA SHEET PMC-941033 ISSUE 6 SATURN USER NETWORK INTERFACE PLUS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 131 Register 0x31: RPOP Interrupt Status Bit Type Function Default Bit 7 R PSLI X Bit 6 Unused X Bit 5 R LOPI X Bit 4 Unused X Bit 3 R PAISI X Bit 2 R PRDII X Bit 1 R BIPEI X Bit 0 R FEBEI X This register allows identification and acknowledgment of path level alarm and error event interrupts. FEBEI: The FEBEI bit is the path FEBE interrupt status bit. FEBEI is a logic one when a FEBE error is detected. This bit is cleared when this register is read. BIPEI: The BIPEI bit is the path BIP-8 interrupt status bit. BIPEI is a logic one when a B3 error is detected. This bit is cleared when this register is read. PRDII: The PRDII bit is the path remote defect indication interrupt status bit. PRDII is a logic one when a change in the path RDI state or the auxiliary path RDI state occurs. This bit is cleared when this register is read. PAISI: The PAISI bit is the path alarm indication signal interrupt status bit. PAISI is a logic one when a change in the path AIS state occurs. This bit is cleared when this register is read. |
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