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LAN88730 Datasheet(PDF) 69 Page - Microchip Technology |
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LAN88730 Datasheet(HTML) 69 Page - Microchip Technology |
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69 / 82 page  2012-2015 Microchip Technology Inc. DS60001256B-page 69 LAN88730 5.7.5.1 RMII CLKIN Requirements 5.7.6 SMI TIMING This section specifies the SMI timing of the device. Please refer to Section 3.5, "Serial Management Interface (SMI)" for additional details. TABLE 5-13: RMII CLKIN (REF_CLK) TIMING VALUES Parameter Min. Typ. Max. Unit Note CLKIN frequency 50 MHz CLKIN Frequency Drift ±50 ppm CLKIN Duty Cycle 40 60 % CLKIN Jitter 150 ps p-p – not RMS FIGURE 5-7: SMI TIMING TABLE 5-14: SMI TIMING VALUES Symbol Description Min. Max. Unit tclkp MDC period 400 ns tclkh MDC high time 160 (80%) ns tclkl MDC low time 160 (80%) ns tval MDIO (read from PHY) output valid from rising edge of MDC 300 ns toinvld MDIO (read from PHY) output invalid from rising edge of MDC 0 ns tsu MDIO (write to PHY) setup time to rising edge of MDC 10 ns tihold MDIO (write to PHY) input hold time after rising edge of MDC 10 ns MDC MDIO tclkh tclkl tclkp toinvld MDIO tsu tihold (Data-Out) (Data-In) toinvld tval (INPUT) |
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