TPS54521

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SLVS981C – JUNE 2010 – REVISED AUGUST 2013

THERMAL INFORMATION

TPS54521

QFN

UNITS

14 PINS

47.2

32

Junction-to-case (top) thermal resistance

64.8

Junction-to-board thermal resistance

14.4

°C/W

Junction-to-top characterization parameter

0.5

Junction-to-board characterization parameter

14.7

Junction-to-case (bottom) thermal resistance

3.2

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

distortion starts to substantially increase. Thermal management of the PCB should strive to keep the junction temperature at or below

125°C for best performance and long-term reliability. See power dissipation estimate in application section of this data sheet for more

information.

(3)

Test board conditions:

(a) 2.5 inches × 2.5 inches, 4 layers, thickness: 0.062 inch

(b) 2 oz. copper traces located on the top of the PCB

(c) 2 oz. copper ground planes on the 2 internal layers and bottom layer

(d) 4 0.010 inch thermal vias located under the device package

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