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HT68F002 Datasheet(PDF) 83 Page - Holtek Semiconductor Inc |
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HT68F002 Datasheet(HTML) 83 Page - Holtek Semiconductor Inc |
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83 / 119 page  Rev. 1.41 82 April 11, 2017 Rev. 1.41 83 April 11, 2017 HT68F002/HT68F0025/HT68F003 Cost-Effective Flash MCU with EEPROM HT68F002/HT68F0025/HT68F003 Cost-Effective Flash MCU with EEPROM Timer/Counter Mode Toselectthismode,bitsPT1M1andPT1M0inthePTM1C1registershouldallbesetto11 respectively.TheTimer/CounterModeoperatesinanidenticalwaytotheCompareMatchOutput Modegeneratingthesameinterruptflags.TheexceptionisthatintheTimer/CounterModethe TMoutputpinisnotused.ThereforetheabovedescriptionandTimingDiagramsfortheCompare MatchOutputModecanbeusedtounderstanditsfunction.AstheTMoutputpinisnotusedinthis mode,thepincanbeusedasanormalI/Opinorotherpin-sharedfunction. PWM Output Mode Toselectthismode,bitsPT1M1andPT1M0inthePTM1C1registershouldbesetto10respectively andalsothePT1IO1andPT1IO0bitsshouldbesetto10respectively.ThePWMfunctionwithin theTMisusefulforapplicationswhichrequirefunctionssuchasmotorcontrol,heatingcontrol, illuminationcontroletc.Byprovidingasignaloffixedfrequencybutofvaryingdutycycleonthe TMoutputpin,asquarewaveACwaveformcanbegeneratedwithvaryingequivalentDCRMS values. AsboththeperiodanddutycycleofthePWMwaveformcanbecontrolled,thechoiceofgenerated waveformisextremelyflexible.InthePWMoutputmode,thePT1CCLRbithasnoeffectasthe PWMperiod.BothoftheCCRPandCCRAregistersareusedtogeneratethePWMwaveform,one registerisusedtocleartheinternalcounterandthuscontrolthePWMwaveformfrequency,while theotheroneisusedtocontrolthedutycycle.ThePWMwaveformfrequencyanddutycyclecan thereforebecontrolledbythevaluesintheCCRAandCCRPregisters. Aninterruptflag,oneforeachoftheCCRAandCCRP,willbegeneratedwhenacomparematch occursfromeitherComparatorAorComparatorP.ThePT1OCbitinthePTM1C1registerisusedto selecttherequiredpolarityofthePWMwaveformwhilethetwoPT1IO1andPT1IO0bitsareused toenablethePWMoutputortoforcetheTMoutputpintoafixedhighorlowlevel.ThePT1POL bitisusedtoreversethepolarityofthePWMoutputwaveform. • 10-bit PWM Mode, Edge-aligned Mode CCRP CCRP = 0~1024 Period CCRP=0 : period= 1024 clocks CCRP=1~1023: period=1~1023 clocks Duty CCRA IffSYS=16MHz,PTMclocksourceselectfSYS/4,CCRP=512andCCRA=128, ThePTMPWMoutputfrequency=(fSYS/4)/512=fSYS/2048=7.8125kHz,duty=128/512=25% IftheDutyvaluedefinedbytheCCRAregisterisequaltoorgreaterthanthePeriodvalue,thenthe PWMoutputdutyis100%. |
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