HT68F002 datasheet(40/119 Pages) HOLTEK

40 / 119 page

Rev. 1.41

April 11, 2017

Rev. 1.41

April 11, 2017

HT68F002/HT68F0025/HT68F003

Cost-Effective Flash MCU with EEPROM

HT68F002/HT68F0025/HT68F003

Cost-Effective Flash MCU with EEPROM

SLOW Mode to NORMAL Mode Switching

InSLOWModethesystemusesLIRClowspeedsystemoscillator.ToswitchbacktotheNORMAL

Mode,wherethehighspeedsystemoscillatorisused,theHLCLKbitshouldbesetto"1"or

HLCLKbitis"0",butCKS2~CKS0issetto"010","011","100","101","110"or"111".Asacertain

amountoftimewillberequiredforthehighfrequencyclocktostabilise,thestatusoftheHTObitis

checked.

NO RM AL M ode

SL E EP0 M ode

SL E EP1 M ode

ID LE 0 M ode

ID LE 1 M ode

SL OW M od e

CK S2 ~C KS0 ¹ 000B , 001B a s HL CL K= 0

or H LC LK =1

WD T is o f f

ID LE N = 0

HA LT i ns tr uc ti on is e xe cu te d

WD T is o n

ID LE N = 0

HA LT i ns tr uc ti on is e xe cu te d

ID LE N = 1, F SYS ON =0

HA LT i ns tr uc ti on i s ex ec ut ed

ID LE N = 1, F SYSO N= 1

HA LT i ns tr uc ti on is e xe cu te d

Entering the SLEEP0 Mode

ThereisonlyonewayforthedevicestoentertheSLEEP0Modeandthatistoexecutethe"HALT"

instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto"0"andthe

WDTandLVDbothoff.Whenthisinstructionisexecutedundertheconditionsdescribedabove,the

followingwilloccur:

• Thesystemclock,WDTclockandTimeBaseclockwillbestoppedandtheapplicationprogram

willstopatthe"HALT"instruction.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheWDTwillbeclearedandstopped.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

HT68F002 Datasheet(PDF) 40 Page - Holtek Semiconductor Inc

HT68F002 Datasheet(HTML) 40 Page - Holtek Semiconductor Inc

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