8XC552 datasheet(45/60 Pages) PHILIPS

45 / 60 page

Philips Semiconductors

80C51 Family Derivatives

8XC552/562 overview

1996 Aug 06

PCT0

BIT

SYMBOL

FUNCTION

IP1.7

PT2

T2 overflow interrupt(s) priority level

IP1.6

PCM2

T2 comparator 2 interrupt priority level

IP1.5

PCM1

T2 comparator 1 interrupt priority level

IP1.4

PCM0

T2 comparator 0 interrupt priority level

IP1.3

PCT3

T2 capture register 3 interrupt priority level

IP1.2

PCT2

T2 capture register 2 interrupt priority level

IP1.1

PCT1

T2 capture register 1 interrupt priority level

IP1.0

PCT0

T2 capture register 0 interrupt priority level

SU00764

PCT1

PCT2

PCT3

PCM0

PCM1

PCM2

PT2

(LSB)

(MSB)

IP1 (F8H)

Figure 31. Interrupt Priority Register (IP1)

Table 8.

Interrupt Priority Structure

SOURCE

NAME

PRIORITY WITHIN LEVEL

External interrupt 0

(highest)

↑

SIO1 (I2C)

ADC completion

ADC

Timer 0 overflow

T2 capture 0

CT0

T2 compare 0

CM0

External interrupt 1

T2 capture 1

CT1

T2 compare 1

CM1

Timer 1 overflow

T2 capture 2

CT2

T2 compare 2

CM2

SIO0 (UART)

T2 capture 3

CT3

Timer T2 overflow

↓

(lowest)

Table 9.

Interrupt Vector Addresses

SOURCE

NAME

VECTOR ADDRESS

External interrupt 0

0003H

Timer 0 overflow

000BH

External interrupt 1

0013H

Timer 1 overflow

001BH

SIO0 (UART)

0023H

SIO1 (I2C)

002BH

T2 capture 0

CT0

0033H

T2 capture 1

CT1

003BH

T2 capture 2

CT2

0043H

T2 capture 3

CT3

004BH

ADC completion

ADC

0053H

T2 compare 0

CM0

005BH

T2 compare 1

CM1

0063H

T2 compare 2

CM2

006BH

T2 overflow

0073H

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