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DRP3510 Datasheet(PDF) 17 Page - List of Unclassifed Manufacturers

Part # DRP3510
Description  Digital Receiver Front-end
PDF  30 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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DRP3510 Datasheet(HTML) 17 Page - List of Unclassifed Manufacturers

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ADVANCE INFORMATION
DRX 3960A
Micronas
17
10 10
Reference divider setting
The DRX 3960A is able to operate with different reference frequencies. The
reference divider has to be set to the value which divides the reference fre-
quency to 100 kHz.
To prevent malfunction after POR, the default value is set for fref = 27 MHz, if
the pin REF_SW is connected to VDVDD or set for fref = 20.25 MHz, if the pin
REF_SW is connected to GND.
bit[8:0]
External_Ref_Freq / 100 kHz
27 MHz
10Dhex
20.25 MHz
CAhex
4MHz
28hex
SYN_REF
10 12
Tuner Take Over Point (TOP) setting
Defines the gain of the internal preamplifier to set the TOP
bit[3:0]
Gain of Preamplifier
00 dB
11.33 dB
22.67 dB
...
810 dB (default)
...
14
18.67 dB
15
20 dB
TOP_SET
10 70
Equalizer coefficient 0
bit[9:1]
Coefficient
bit[0]
Update bit
0
do not update coefficients
1
update coefficients
EQU_0
10 71
Equalizer coefficient 1
bit[8:0]
Coefficient
EQU_1
10 72
Equalizer coefficient 2
bit[8:0]
Coefficient
EQU_2
10 73
Equalizer coefficient 3
bit[8:0]
Coefficient
EQU_3
Table 4–8: Write Register on I2C Subaddress 10hex
I2C-Sub-
address
(hex)
Function
Name



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