LM9800 datasheet(25/34 Pages) NSC

25 / 34 page

Applications Information (Continued)

LM9800’s OS input and the output impedance of the CCD.

The leakage through the OS input determines how quickly

the capacitor value will drift from the clamp value of REF

OUT

MID, which then determines how many pixels can be

processed before the droop causes errors in the conversion

(±0.1V is the recommended limit). The output impedance of

the CCD determines how quickly the capacitor can be

charged to the clamp value during the black reference period

at the beginning of every line.

The minimum clamp capacitor value is determined by the

maximum droop the LM9800 can tolerate while converting

one CCD line. The following equation takes the maximum

leakage current into the OS input, the maximum allowable

droop (100mV), the number of pixels on the CCD, and the

pixel conversion rate (f

MCLK/8) and provides the minimum

clamp capacitor value:

For example, if the OS input leakage current is 20nA worst-

case, the CCD has 2200 active pixels, the conversion rate is

2.5MHz (f

MCLK = 20MHz), and the max droop desired is

0.05V, the minimum clamp capacitor value is:

The maximum size of the clamp capacitor is determined by

the amount of time available to charge it to the desired value

during the optical black portion of the CCD output. The inter-

nal clamp is on for each pixel from the rising edge of the S/H

ref pulse to the falling edge of the S/H signal pulse (see

Fig-

ures 7, 8 ). This time can be calculated using the values

stored in the Sample Signal and Sample Reference configu-

ration registers and the MCLK frequency. For normal CCDs:

And for even/odd CCDs:

Where SS is the value in the Sample Signal Position register

(0–15), SR is the value in the Sample Reference Position

MCLK is the MCLK frequency, and tDARK is

the amount of time (per pixel) that the clamp is on.

The following equation takes the number of optical black pix-

els, the amount of time (per pixel) that the clamp is closed,

the CCD’s output impedance, and the desired accuracy of

the final clamp voltage and provides the maximum clamp ca-

pacitor value:

Where n = the number of optical black pixels, t

DARK is the

amount of time (per pixel) that the clamp is on, R

OUT is the

output impedance of the CCD, and accuracy is the ratio of

the worst-case initial capacitor voltage to the desired final

capacitor voltage. For example, if a CCD has 18 black refer-

ence pixels, the output impedance of the CCD is 1000

Ω, the

LM9800 is configured to clamp for 300ns, the worst case ini-

tial voltage across the capaoitor is 10V, and the desired volt-

age after clamping is 0.05V (accuracy = 10/0.05 = 200),

then:

The final value for C

CLAMP should be equal to or slightly less

than C

CLAMP MAX, but no less than CCLAMP MIN.

The LM9800 has been designed to work with most of the

single output CCDs in use, but it is possible that some CCDs

could have a combination of high output impedance and low

optical black pixel count that would cause C

CLAMP MIN to be

greater than C

CLAMP MAX. In this case the LM9800 can be

“short cycled” as shown in

Figure 30, by bringing the sync

pin low and then high again shortly after clamping the black

reference pixels. This starts the line over, effectively increas-

ing the number of black reference pixels, giving the capacitor

more time to charge up through the output impedance of the

CCD. This “short cycling” can be repeated as many times as

necessary in order to guarantee that the capacitor is charged

up to the required accuracy. Short cycling, if needed at all, is

only necessary on power up and at the beginning of new

scans where the OS coupling capacitor may have drooped

since the previous scan. If the SYNC input is continuously

being cycled at the line rate, short cycling is usually not

necessary.

DS012498-53

FIGURE 29. OS Clamp Capacitor and Internal Clamp

DS012498-35

FIGURE 30. Example of Short Cycling

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