LM9800 datasheet(5/34 Pages) NSC

5 / 34 page

AC Electrical Characteristics, MCLK Independent (Continued)

The following specifications apply for AGND = DGND = DGND

(I/O) = 0V, VA = VD = VD(I/O) = +5.0VDC, REF IN = +1.225VDC,

MCLK = 20MHz, tMCLK = 1/fMCLK,tr = tf = 5ns, Rs = 25Ω,CL (databus loading) = 50 pF/pin. Boldface limits apply for TA =

J = TMIN to TMAX; all other limits TA = TJ = 25˚C.

Symbol

Parameter

Conditions

Typical

Limits

Units

(Note 9)

(Note 10)

(Limits)

DACC

Access Time Delay from RD Low to

DD0–DD7 Data Valid

ns (max)

SCLK

Maximum SCLK Frequency

2.5

MHz (max)

SCLK Duty Cycle

% (min)

% (max)

SDI

SDI Set-Up Time from SCLK

Rising Edge

ns (min)

HDI

SDI Hold Time from SCLK

Rising Edge

ns (min)

DDO

Delay from SCLK Falling Edge to

SDO Data Valid

ns (max)

HDO

SDO Hold Time from SCLK

L = 3K, CL = 25 pF

ns (max)

Falling Edge

ns (min)

DELAY

DELAY from SCLK Falling Edge to

CS Rising or Falling Edge

ns (min)

SETUP

Set-Up Time of CS Rising or Falling

Edge to SCLK Rising Edge

−2

ns (min)

SACC

Access Time Delay from CS Falling

Edge to SDO Data Valid

ns (max)

S1H,tS0H

Delay from CS Rising Edge to SDO

TRI-STATE

L = 3K, CL = 50 pF

100

ns (max)

RDO

SDO Rise Time, TRI-STATE to High

L = 3K, CL = 50 pF

SDO Rise Time, Low to High

FDO

SDO Fall Time, TRI-STATE to Low

L = 3K, CL = 50 pF

SDO Fall Time, High to Low

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