LM9800 datasheet(20/34 Pages) NSC

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Configuration Register t

MCLK = 1/fMCLK = 1 MCLK period. Examples given in parenthesis are for fMCLK =

20MHz (t

MCLK = 50ns). (Continued)

TABLE 2. Configuration Register Parameters (Continued)

Parameter

Control Bits

Result

Sample Signal

Position (t

S/HSIG)

SS3

SS2

SS1

SS0

0000

0.0t

MCLK (0 ns)

0001

0.5t

MCLK (25 ns)

0010

1.0t

MCLK (50 ns)

0011

1.5t

MCLK (75 ns)

0100

2.0t

MCLK (100 ns)

0101

2.5t

MCLK (125 ns)

0110

3.0t

MCLK (150 ns)

0111

3.5t

MCLK (175 ns)

1000

4.0t

MCLK (200 ns)

1001

4.5t

MCLK (225 ns)

1010

5.0t

MCLK (250 ns)

1011

5.5t

MCLK (275 ns)

1100

6.0t

MCLK (300 ns)

1101

6.5t

MCLK (325 ns)

1110

7.0t

MCLK (350 ns)

1111

7.5t

MCLK (375 ns)

φ1 Enable

φ1EN

φ1 Output Off

φ1 Output On

φ2 Enable

φ2EN

φ2 Output Off

φ2 Output On

RS Enable

RSEN

RS Output Off

RS Output On

TR Enable

TREN

TR Output Off

TR Output On

TR Pulse Width

TRWIDTH)

TRW1

TRW0

20 t

MCLK (1.0 µs)

30 t

MCLK (1.5 µs)

40 t

MCLK (2.0 µs)

50 t

MCLK (2.5 µs)

TR-

φ1

TRGRD

Guardband

MCLK (50 ns)

GUARD)1

MCLK (100 ns)

TR Polarity

TRPOL

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