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LTC3895

3895fa

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4. IstheDRVCCanddecouplingcapacitorconnectedclose

to the IC, between the DRVCCandthegroundpin?This

capacitor carries the MOSFET drivers’ current peaks.

5. Keep the SW, TG, and BOOST nodes away from sensi-

tive small-signal nodes. All of these nodes have very

large and fast moving signals and therefore should be

kept on the output side of the LTC3895 and occupy

minimum PC trace area.

6. Useamodifiedstargroundtechnique:alowimpedance,

large copper area central grounding point on the same

side of the PC board as the input and output capacitors

with tie-ins for the bottom of the DRVCC decoupling

capacitor, the bottom of the voltage feedback resistive

divider and the GND pin of the IC.

PC Board Layout Debugging

It is helpful to use a DC-50MHz current probe to monitor

thecurrentintheinductorwhiletestingthecircuit.Monitor

the output switching node (SW pin) to synchronize the

oscilloscope to the internal oscillator and probe the actual

output voltage as well. Check for proper performance over

the operating voltage and current range expected in the

application. The frequency of operation should be main-

tained over the input voltage range down to dropout and

until the output load drops below the low current opera-

tion threshold—typically 25% of the maximum designed

current level in Burst Mode operation.

Thedutycyclepercentageshouldbemaintainedfromcycle

tocycleinawell-designed,lownoisePCBimplementation.

Variation in the duty cycle at a subharmonic rate can sug-

gest noise pickup at the current or voltage sensing inputs

or inadequate loop compensation. Overcompensation of

applicaTions inForMaTion

the loop can be used to tame a poor PC layout if regulator

bandwidth optimization is not required.

Reduce VIN from its nominal level to verify operation of

the regulator in dropout. Check the operation of the un-

dervoltage lockout circuit by further lowering VIN while

monitoring the output to verify operation.

Investigate whether any problems exist only at higher out-

put currents or only at higher input voltages. If problems

coincide with high input voltages and low output currents,

look for capacitive coupling between the BOOST, SW, TG,

and possibly BG connections and the sensitive voltage

and current pins. The capacitor placed across the current

sensing pins needs to be placed immediately adjacent to

the pins of the IC. This capacitor helps to minimize the

effects of differential noise injection due to high frequency

capacitive coupling. If problems are encountered with

high current output loading at lower input voltages, look

for inductive coupling between CIN, the top MOSFET and

the bottom MOSFET to the sensitive current and voltage

sensing traces. In addition, investigate common ground

path voltage pickup between these components and the

GND pin of the IC.

An embarrassing problem, which can be missed in an

otherwise properly working switching regulator, results

when the current sensing leads are hooked up backwards.

The output voltage under this improper hookup will still

be maintained but the advantages of current mode control

will not be realized. Compensation of the voltage loop will

be much more sensitive to component selection. This

behavior can be investigated by temporarily shorting out

the current sensing resistor—don’t worry, the regulator

will still maintain control of the output voltage.

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