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AM3351 Datasheet(PDF) 70 Page - Texas Instruments

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Part # AM3351
Description  Sitara Processors
PDF  252 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM3351 Datasheet(HTML) 70 Page - Texas Instruments

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AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351
SPRS717J – OCTOBER 2011 – REVISED APRIL 2016
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351
Terminal Configuration and Functions
Copyright © 2011–2016, Texas Instruments Incorporated
4.3.6.2
GEMAC_CPSW
Table 4-41. GEMAC_CPSW/MDIO Signals Description
SIGNAL NAME [1]
DESCRIPTION [2]
TYPE
[3]
ZCE BALL [4]
ZCZ BALL [4]
mdio_clk
MDIO Clk
O
R19
M18
mdio_data
MDIO Data
I/O
P17
M17
Table 4-42. GEMAC_CPSW/MII1 Signals Description
SIGNAL NAME [1]
DESCRIPTION [2]
TYPE
[3]
ZCE BALL [4]
ZCZ BALL [4]
gmii1_col
MII Colision
I
J19
H16
gmii1_crs
MII Carrier Sense
I
J18
H17
gmii1_rxclk
MII Receive Clock
I
M19
L18
gmii1_rxd0
MII Receive Data bit 0
I
P18
M16
gmii1_rxd1
MII Receive Data bit 1
I
P19
L15
gmii1_rxd2
MII Receive Data bit 2
I
N16
L16
gmii1_rxd3
MII Receive Data bit 3
I
N17
L17
gmii1_rxdv
MII Receive Data Valid
I
L19
J17
gmii1_rxer
MII Receive Data Error
I
K19
J15
gmii1_txclk
MII Transmit Clock
I
N19
K18
gmii1_txd0
MII Transmit Data bit 0
O
L18
K17
gmii1_txd1
MII Transmit Data bit 1
O
M18
K16
gmii1_txd2
MII Transmit Data bit 2
O
N18
K15
gmii1_txd3
MII Transmit Data bit 3
O
M17
J18
gmii1_txen
MII Transmit Enable
O
K17
J16
Table 4-43. GEMAC_CPSW/MII2 Signals Description
SIGNAL NAME [1]
DESCRIPTION [2]
TYPE
[3]
ZCE BALL [4]
ZCZ BALL [4]
gmii2_col
MII Colision
I
V18
U18
gmii2_crs
MII Carrier Sense
I
R15
T17
gmii2_rxclk
MII Receive Clock
I
NA
T15
gmii2_rxd0
MII Receive Data bit 0
I
NA
V17
gmii2_rxd1
MII Receive Data bit 1
I
NA
T16
gmii2_rxd2
MII Receive Data bit 2
I
NA
U16
gmii2_rxd3
MII Receive Data bit 3
I
NA
V16
gmii2_rxdv
MII Receive Data Valid
I
NA
V14
gmii2_rxer
MII Receive Data Error
I
W18
U17
gmii2_txclk
MII Transmit Clock
I
NA
U15
gmii2_txd0
MII Transmit Data bit 0
O
NA
V15
gmii2_txd1
MII Transmit Data bit 1
O
NA
R14
gmii2_txd2
MII Transmit Data bit 2
O
NA
T14
gmii2_txd3
MII Transmit Data bit 3
O
NA
U14
gmii2_txen
MII Transmit Enable
O
NA
R13
Table 4-44. GEMAC_CPSW/RGMII1 Signals Description
SIGNAL NAME [1]
DESCRIPTION [2]
TYPE
[3]
ZCE BALL [4]
ZCZ BALL [4]
rgmii1_rclk
RGMII Receive Clock
I
M19
L18



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