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AM3351 Datasheet(PDF) 88 Page - Texas Instruments |
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AM3351 Datasheet(HTML) 88 Page - Texas Instruments |
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88 / 252 page ![]() 88 AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351 SPRS717J – OCTOBER 2011 – REVISED APRIL 2016 www.ti.com Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351 Specifications Copyright © 2011–2016, Texas Instruments Incorporated 5.7 DC Electrical Characteristics over recommended ranges of supply voltage and operating temperature (unless otherwise noted) (1) PARAMETER MIN NOM MAX UNIT DDR_RESETn,DDR_CSn0,DDR_CKE,DDR_CK,DDR_CKn,DDR_CASn,DDR_RASn,DDR_WEn,DDR_BA0,DDR_BA1,DDR_BA2,DDR_A0,DDR_A1,DDR_A 2,DDR_A3,DDR_A4,DDR_A5,DDR_A6,DDR_A7,DDR_A8,DDR_A9,DDR_A10,DDR_A11,DDR_A12,DDR_A13,DDR_A14,DDR_A15,DDR_ODT,DDR_D0,DD R_D1,DDR_D2,DDR_D3,DDR_D4,DDR_D5,DDR_D6,DDR_D7,DDR_D8,DDR_D9,DDR_D10,DDR_D11,DDR_D12,DDR_D13,DDR_D14,DDR_D15,DDR_DQM 0,DDR_DQM1,DDR_DQS0,DDR_DQSn0,DDR_DQS1,DDR_DQSn1 Pins (mDDR - LVCMOS Mode) VIH High-level input voltage 0.65 × VDDS_DDR V VIL Low-level input voltage 0.35 × VDDS_DDR V VHYS Hysteresis voltage at an input 0.07 0.25 V VOH High level output voltage, driver enabled, pullup or pulldown disabled IOH = 8 mA VDDS_DDR – 0.4 V VOL Low level output voltage, driver enabled, pullup or pulldown disabled IOL = 8 mA 0.4 V II Input leakage current, Receiver disabled, pullup or pulldown inhibited 10 µA Input leakage current, Receiver disabled, pullup enabled –240 –80 Input leakage current, Receiver disabled, pulldown enabled 80 240 IOZ Total leakage current through the terminal connection of a driver-receiver combination that may include a pullup or pulldown. The driver output is disabled and the pullup or pulldown is inhibited. 10 µA DDR_RESETn,DDR_CSn0,DDR_CKE,DDR_CK,DDR_CKn,DDR_CASn,DDR_RASn,DDR_WEn,DDR_BA0,DDR_BA1,DDR_BA2,DDR_A0,DDR_A1,DDR_A 2,DDR_A3,DDR_A4,DDR_A5,DDR_A6,DDR_A7,DDR_A8,DDR_A9,DDR_A10,DDR_A11,DDR_A12,DDR_A13,DDR_A14,DDR_A15,DDR_ODT,DDR_D0,DD R_D1,DDR_D2,DDR_D3,DDR_D4,DDR_D5,DDR_D6,DDR_D7,DDR_D8,DDR_D9,DDR_D10,DDR_D11,DDR_D12,DDR_D13,DDR_D14,DDR_D15,DDR_DQM 0,DDR_DQM1,DDR_DQS0,DDR_DQSn0,DDR_DQS1,DDR_DQSn1 Pins (DDR2 - SSTL Mode) VIH High-level input voltage DDR_VREF + 0.125 V VHYS Hysteresis voltage at an input N/A V VOH High-level output voltage, driver enabled, pullup or pulldown disabled IOH = 8 mA VDDS_DDR – 0.4 V VOL Low-level output voltage, driver enabled, pullup or pulldown disabled IOL = 8 mA 0.4 V II Input leakage current, Receiver disabled, pullup or pulldown inhibited 10 µA Input leakage current, Receiver disabled, pullup enabled –240 –80 Input leakage current, Receiver disabled, pulldown enabled 80 240 IOZ Total leakage current through the terminal connection of a driver-receiver combination that may include a pullup or pulldown. The driver output is disabled and the pullup or pulldown is inhibited. 10 µA DDR_RESETn,DDR_CSn0,DDR_CKE,DDR_CK,DDR_CKn,DDR_CASn,DDR_RASn,DDR_WEn,DDR_BA0,DDR_BA1,DDR_BA2,DDR_A0,DDR_A1,DDR_A 2,DDR_A3,DDR_A4,DDR_A5,DDR_A6,DDR_A7,DDR_A8,DDR_A9,DDR_A10,DDR_A11,DDR_A12,DDR_A13,DDR_A14,DDR_A15,DDR_ODT,DDR_D0,DD R_D1,DDR_D2,DDR_D3,DDR_D4,DDR_D5,DDR_D6,DDR_D7,DDR_D8,DDR_D9,DDR_D10,DDR_D11,DDR_D12,DDR_D13,DDR_D14,DDR_D15,DDR_DQM 0,DDR_DQM1,DDR_DQS0,DDR_DQSn0,DDR_DQS1,DDR_DQSn1 Pins (DDR3, DDR3L - HSTL Mode) VIH High-level input voltage VDDS_DDR = 1.5 V DDR_VREF + 0.1 V VDDS_DDR = 1.35 V DDR_VREF + 0.09 VIL Low-level input voltage VDDS_DDR = 1.5 V DDR_VREF – 0.1 V VDDS_DDR = 1.35 V DDR_VREF – 0.09 VHYS Hysteresis voltage at an input N/A V VOH High-level output voltage, driver enabled, pullup or pulldown disabled IOH = 8 mA VDDS_DDR – 0.4 V VOL Low-level output voltage, driver enabled, pullup or pulldown disabled IOL = 8 mA 0.4 V II Input leakage current, Receiver disabled, pullup or pulldown inhibited 10 µA Input leakage current, Receiver disabled, pullup enabled –240 –80 Input leakage current, Receiver disabled, pulldown enabled 80 240 IOZ Total leakage current through the terminal connection of a driver-receiver combination that may include a pullup or pulldown. The driver output is disabled and the pullup or pulldown is inhibited. 10 µA |
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