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AM3351 Datasheet(PDF) 85 Page - Texas Instruments |
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AM3351 Datasheet(HTML) 85 Page - Texas Instruments |
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85 / 252 page  85 AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351 www.ti.com SPRS717J – OCTOBER 2011 – REVISED APRIL 2016 Submit Documentation Feedback Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351 Specifications Copyright © 2011–2016, Texas Instruments Incorporated Recommended Operating Conditions (continued) over junction temperature range (unless otherwise noted) SUPPLY NAME DESCRIPTION MIN NOM MAX UNIT VDDSHV3(6) Supply voltage range for dual- voltage I/O domain (1.8-V operation) 1.710 1.800 1.890 V VDDSHV4 Supply voltage range for dual- voltage I/O domain (1.8-V operation) 1.710 1.800 1.890 V VDDSHV5 Supply voltage range for dual- voltage I/O domain (1.8-V operation) 1.710 1.800 1.890 V VDDSHV6 Supply voltage range for dual- voltage I/O domain (1.8-V operation) 1.710 1.800 1.890 V VDDSHV1 Supply voltage range for dual- voltage I/O domain (3.3-V operation) 3.135 3.300 3.465 V VDDSHV2(6) Supply voltage range for dual- voltage I/O domain (3.3-V operation) 3.135 3.300 3.465 V VDDSHV3(6) Supply voltage range for dual- voltage I/O domain (3.3-V operation) 3.135 3.300 3.465 V VDDSHV4 Supply voltage range for dual- voltage I/O domain (3.3-V operation) 3.135 3.300 3.465 V VDDSHV5 Supply voltage range for dual- voltage I/O domain (3.3-V operation) 3.135 3.300 3.465 V VDDSHV6 Supply voltage range for dual- voltage I/O domain (3.3-V operation) 3.135 3.300 3.465 V DDR_VREF Voltage range for DDR SSTL and HSTL reference input (DDR2, DDR3, DDR3L) 0.49 × VDDS_DDR 0.50 × VDDS_DDR 0.51 × VDDS_DDR V USB0_VBUS Voltage range for USB VBUS comparator input 0.000 5.000 5.250 V USB1_VBUS(6) Voltage range for USB VBUS comparator input 0.000 5.000 5.250 V USB0_ID Voltage range for the USB ID input (7) V USB1_ID(6) Voltage range for the USB ID input (7) V Operating temperature range, TJ Commercial temperature 0 90 °C Industrial temperature –40 90 Extended temperature –40 105 (1) The supply voltage defined by OPP100 should be applied to this power domain before the device is released from reset. (2) Not available on the ZCE package. VDD_MPU is merged with VDD_CORE on the ZCE package. (3) This supply is sourced from an internal LDO when RTC_KALDO_ENn is low. If RTC_KALDO_ENn is high, this supply must be sourced from an external power supply. (4) VDDS should be supplied irrespective of 1.8- or 3.3-V mode of operation of the dual-voltage I/Os. (5) For more details on power supply requirements, see Section 6.1.4. (6) Not available on the ZCE package. (7) This terminal is connected to analog circuits in the respective USB PHY. The circuit sources a known current while measuring the voltage to determine if the terminal is connected to VSSA_USB with a resistance less than 10 Ω or greater than 100 kΩ. The terminal should be connected to ground for USB host operation or open-circuit for USB peripheral operation, and should never be connected to any external voltage source. |
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