AM3351 datasheet(135/252 Pages) TI1

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AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351

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SPRS717J – OCTOBER 2011 – REVISED APRIL 2016

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Peripheral Information and Timings

7.7.1.2

GPMC and NOR Flash—Asynchronous Mode

Table 7-24 and Table 7-25 assume testing over the recommended operating conditions and electrical

characteristic conditions shown in Table 7-23 (see Figure 7-22 through Figure 7-27).

Table 7-23. GPMC and NOR Flash Timing Conditions—Asynchronous Mode

MIN

TYP

MAX

UNIT

Input Conditions

Input signal rise time

Input signal fall time

Output Condition

CLOAD

Output load capacitance

Table 7-24. GPMC and NOR Flash Internal Timing Requirements—Asynchronous Mode(1)(2)

NO.

OPP100

OPP50

UNIT

MIN

MAX

MIN

MAX

FI1

Delay time, output data gpmc_ad[15:0] generation from internal functional clock

GPMC_FCLK(3)

6.5

FI2

Delay time, input data gpmc_ad[15:0] capture from internal functional clock

GPMC_FCLK(3)

FI3

Delay time, output chip select gpmc_csn[x] generation from internal functional

clock GPMC_FCLK(3)

6.5

FI4

Delay time, output address gpmc_a[27:1] generation from internal functional clock

GPMC_FCLK(3)

6.5

FI5

Delay time, output address gpmc_a[27:1] valid from internal functional clock

GPMC_FCLK(3)

6.5

FI6

Delay time, output lower-byte enable and command latch enable gpmc_be0n_cle,

output upper-byte enable gpmc_be1n generation from internal functional clock

GPMC_FCLK(3)

6.5

FI7

Delay time, output enable gpmc_oen generation from internal functional clock

GPMC_FCLK(3)

6.5

FI8

Delay time, output write enable gpmc_wen generation from internal functional

clock GPMC_FCLK(3)

6.5

FI9

Skew, internal functional clock GPMC_FCLK(3)

100

(1) The internal parameters table must be used to calculate data access time stored in the corresponding CS register bit field.

(2) Internal parameters are referred to the GPMC functional internal clock which is not provided externally.

(3) GPMC_FCLK is general-purpose memory controller internal functional clock.

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