ISL62391IRTZ datasheet(15/22 Pages) RENESAS

15 / 22 page

ISL62391, ISL62392, ISL62391C, ISL62392C

FN6666 Rev 8.00

Page 15 of 22

August 25, 2015

to all load conditions, but will have increased light-load power

loss. If FCCM is forced low, the ISL62391, ISL62392,

ISL62391C and ISL62392C will automatically operate in Diode

Emulation Mode (DEM) at light load to optimize efficiency in the

entire load range. The transition is automatically achieved by

detecting the load current and turning off LGATE when the

inductor current reaches 0A.

Positive-going inductor current flows from either the source of

the high-side MOSFET, or the drain of the low-side MOSFET.

Negative-going inductor current flows into the drain of the low-

side MOSFET. When the low-side MOSFET conducts positive

inductor current, the phase voltage will be negative with

respect to the GND and PGND pins. Conversely, when the

low-side MOSFET conducts negative inductor current, the

phase voltage will be positive with respect to the GND and

PGND pins. The ISL62391, ISL62392, ISL62391C and

ISL62392C monitor the phase voltage when the low-side

MOSFET is conducting inductor current to determine its

direction.

When the output load current is greater than or equal to ½ the

inductor ripple current, the inductor current is always positive,

and the converter is always in CCM. The ISL62391, ISL62392,

ISL62391C and ISL62392C minimize the conduction loss in

this condition by forcing the low-side MOSFET to operate as a

synchronous rectifier.

When the output load current is less than ½ the inductor ripple

current, negative inductor current occurs. Sinking negative

inductor through the low-side MOSFET lowers efficiency

through unnecessary conduction losses. The ISL62391,

ISL62392, ISL62391C and ISL62392C automatically enter

DEM after the PHASE pin has detected positive voltage and

LGATE was allowed to go high for 8 consecutive PWM

switching cycles. The ISL62391, ISL62392, ISL62391C and

ISL62392C will turn off the low-side MOSFET once the phase

voltage turns positive, indicating negative inductor current. The

ISL62391, ISL62392, ISL62391C and ISL62392C will return to

CCM on the following cycle after the PHASE pin detects

negative voltage, indicating that the body diode of the low-side

MOSFET is conducting positive inductor current.

Efficiency can be further improved with a reduction of

unnecessary switching losses by reducing the PWM frequency.

It is characteristic of the R3 architecture for the PWM

frequency to decrease while in diode emulation. The extent of

the frequency reduction is proportional to the reduction of load

current. Upon entering DEM, the PWM frequency makes an

initial step-reduction because of a 33% step-increase of the

window voltage VW.

Because the switching frequency in DEM is a function of load

current, very light load conditions can produce frequencies well

into the audio band. This can be problematic if audible noise is

coupled into audio amplifier circuits. To prevent this from

occurring, the ISL62391, ISL62392, ISL62391C and

ISL62392C allow the user to float the FCCM input. This will

allow DEM at light loads, but will prevent the switching

frequency from going below ~28kHz to prevent noise injection

to the audio band. A timer is reset each PWM pulse. If the

timer exceeds 30µs, LGATE is turned on, causing the ramp

voltage to reduce until another UGATE is commanded by the

voltage loop.

Overcurrent Protection

The overcurrent protection (OCP) setpoint is programmed with

resistor, ROCSET, that is connected across the OCSET and

PHASE pins.

Figure 26 shows the overcurrent-set circuit for SMPS1. The

inductor consists of inductance L and the DC resistance

(DCR). The inductor DC current IL creates a voltage drop

across DCR, which is given by Equation 6:

The ISL62391, ISL62392, ISL62391C and ISL62392C sink a

10µA current into the OCSET1 pin, creating a DC voltage drop

across the resistor ROCSET, which is given by Equation 7:

Resistor RO is connected between the ISEN1 pin and the

actual output voltage of the converter. During normal

operation, the ISEN1 pin is a high impedance path, therefore

there is no voltage drop across RO. The DC voltage difference

between the OCSET1 pin and the ISEN1 pin can be

established using Equation 8:

The ISL62391, ISL62392, ISL62391C and ISL62392C monitor

the OCSET1 pin and the ISEN1 pin voltages. Once the

OCSET1 pin voltage is higher than the ISEN1 pin voltage for

more than 10µs, the ISL62391, ISL62392, ISL62391C and

ISL62392C declare an OCP fault. The value of ROCSET is then

written as Equation 9:

FIGURE 26. OVERCURRENT-SET CIRCUIT

PHASE1

ROCSET

CSEN

OCSET1

ISEN1

ISL62391,

DCR

10µA

VDCR

VROCSET

ISL62392

VDCR

IL DCR



(EQ. 6)

VROCSET

AR

OCSET



(EQ. 7)

VOCSET1 V

– ISEN1

IL DCR



AR

OCSET



–

(EQ. 8)

(EQ. 9)

ROCSET

IOC DCR



A

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