AD8318 datasheet(13/24 Pages) AD

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AD8318

Rev. 0 | Page 13 of 24

Table 4. Input Impedance for Select Frequency

S11

Frequency

MHz

Real

Imaginary

Impedance Ω

(Series)

100

0.918

−0.041

927-j491

456

0.905

−0.183

173-j430

900

0.834

−0.350

61-j233

1900

0.605

−0.595

28-j117

2200

0.524

−0.616

28-j102

3600

0.070

−0.601

26-j49

5300

−0.369

−0.305

20-j16

5800

−0.326

−0.286

22-j16

8000

−0.390

−0.062

22-j3

OUTPUT INTERFACE

The VOUT pin is driven by a PNP output stage. An internal 10 Ω

resistor is placed in series with the emitter follower output and

the VOUT pin. The rise time of the output is limited mainly by

the slew on CLPF. The fall time is an RC limited slew given by

the load capacitance and the pull-down resistance at VOUT.

There is an internal pull-down resistor of 350 Ω. Any resistive

load at VOUT is placed in parallel with the internal pull-down

resistor and provides additional discharge current.

0.2V

150

Ω

200

Ω

–

Ω

VOUT

VPSO

CLPF

CMOP

Figure 25. Output Interface

SETPOINT INTERFACE

The VSET input drives the high impedance (250 kΩ) input of an

internal op amp. The VSET voltage appears across the internal

3.13 kΩ resistor to generate ISET. When a portion of VOUT is

applied to VSET, the feedback loop forces −ID × log10

(VIN/VINTERCEPT) = ISET. If VSET = VOUT/X, then ISET =

VOUT/(X × 3.13 kΩ). The result is

VOUT = (−ID × 3.13 kΩ × X) × log10(VIN/VINTERCEPT)

3.13k

Ω

ISET

CMOP

VSET

Figure 26. VSET Interface

The slope is given by –ID × X × 3.13 kΩ = –500 mV × X. For

example, if a resistor divider to ground is used to generate a

VSET voltage of VOUT/2, then X = 2. The slope will be set to

–1 V/decade or –50 mV/dB.

TEMPERATURE COMPENSATION OF OUTPUT

VOLTAGE

The AD8318 functionality includes the capability to

externally trim the temperature drift. Attaching a ground-

referenced resistor to the TADJ pin alters an internal current,

which works to minimize intercept drift vs. temperature. As

a result, the TADJ resistor can be optimized for operation at

different frequencies.

Ω

ICOMP

~0.4V

TADJ

INTERNAL

Figure 27. TADJ Interface

A resistor, nominally 500 Ω for optimal temperature

compensation at 2.2 GHz input frequency, is connected

between this pin and ground (see Figure 22). The value of

this resistor partially determines the magnitude of an analog

correction coefficient, which is employed to reduce

intercept drift.

Table 5 lists recommended resistors for other frequencies.

These resistors have been chosen to provide the best overall

temperature drift based on measurements of a diverse

population of devices.

The relationship between output temperature drift and

frequency is not linear and cannot be easily modeled. As a

result, experimentation is required to choose the correct

TADJ resistor at frequencies not listed in Table 5.

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