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AD8318 Datasheet(PDF) 19 Page - Analog Devices |
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AD8318 Datasheet(HTML) 19 Page - Analog Devices |
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19 / 24 page ![]() AD8318 Rev. 0 | Page 19 of 24 RFIN VGA/VVA GAIN CONTROL VOLTAGE DIRECTIONAL COUPLER ATTENUATOR INHI VSET INLO CLPF VOUT AD8318 52.3 Ω 1nF CFLT 1nF DAC Figure 39. AD8318 Controller Mode Decreasing VSET, which corresponds to demanding a higher signal from the VGA, will tend to increase VOUT. The gain control voltage of the VGA must have a positive sense that is increasing gain control voltage increases gain. The basic connections for operating the AD8318 as an analog controller with the AD8367 are shown in Figure 40. The AD8367 is a low frequency to 500 MHz VGA with 45 dB of dynamic range. This configuration is very similar to the one shown in Figure 39. The gain of the AD8367 is controlled by the voltage applied to the GAIN pin. This voltage, VGAIN, is scaled linear-in-dB with a slope of 20 mV/dB and runs from 50 mV at –2.5 dB of gain, up to 1.0 V at +42.5 dB. The incoming RF signal to the AD8367 has a varying amplitude level; receiving and demodulating it with the lowest possible error requires that the signal levels be optimized for the highest signal-to-noise ratio (SNR) feeding into the analog-to-digital converters (ADC). This can be accomplished by using an automatic gain control (AGC) loop. In Figure 40 the voltage output of the AD8318 is used to modify the gain of the AD8367 until the incoming RF signal produces an output voltage that is equal to the setpoint voltage VSET. +3V INPT VOUT VPOS GND GAIN AD8367 VGA HPLF RF INPUT SIGNAL RF OUTPUT SIGNAL +5V VSET CLPF INHI VPOS GND AD8318 VOUT INLO R1 1k Ω 1nF 1nF 0.1 µF CFLT 100pF 100MHz BANDPASS FILTER 174 Ω R2 261 Ω RHP 100 Ω CHP 100pF DAC +VSET SETPOINT VOLTAGE 57.6 Ω Figure 40. AD8318 Operating in Controller Mode to Provide Automatic Gain Control Functionality in Combination with the AD8367 This AGC loop is capable of controlling signals over ~45 dB dynamic range. The output of the AD8367 is designed to drive loads ≥ 200 Ω. As a result, it is not necessary to use the 53.6 Ω resistor at the input of the AD8318; the nominal input impedance of 2 kΩ is sufficient. If the AD8367’s output is to be driving a 50 Ω load, such as an oscilloscope or spectrum analyzer, a simple resistive divider network can be used. Note that the divider used in Figure 40 has an insertion loss of 11.5 dB. Figure 41 shows the transfer function of output power versus VSET voltage for a 100 MHz sine wave at −40 dBm into the AD8367. 0 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 –10 –5 1.2 –1.2 –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VSET (V) Figure 41. AD8367 Output Power vs. AD8318 Setpoint Voltage In order for the AGC loop to remain locked, the AD8318 must track the envelope of the VGA’s output signal and provide the necessary voltage levels to the AD8367’s gain control input. Figure 42 shows an oscilloscope screenshot of the AGC loop depicted in Figure 40. A 50 MHz sine wave with 50% AM modulation is applied to the AD8367. The output signal from the VGA is a constant envelope sine wave with an amplitude corresponding to a setpoint voltage at the AD8318 of 1.0 V. Figure 42. Oscilloscope Screenshot Showing an AM Modulated Input Signal to the AD8367. The AD8318 tracks the envelope of this input signal and applies the appropriate voltage to ensure a constant output from the AD8367. |
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