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AD8318 Datasheet(PDF) 21 Page - Analog Devices |
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AD8318 Datasheet(HTML) 21 Page - Analog Devices |
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21 / 24 page ![]() AD8318 Rev. 0| Page 21 of 24 EVALUATION BOARD Table 6. Evaluation Board (Rev A) Configuration Options Component Function Default Conditions TP1, TP2 Supply and Ground Connections Not Applicable SW1 Device Enable: When in position A, the ENBL pin is connected to VP and the AD8318 is in operating mode. In position B, the ENBL pin is grounded through R3, putting the device in power-down mode. The ENBL pin may be exercised by a pulse generator connected to J3 with SW1 in position B. SW1 = A R3 = 10k (Size 0603) R1, C1, C2 Input Interface: The 52.3 Ω resistor in position R1 combines with the AD8318's internal input impedance to give a broadband input impedance of around 50 Ω. Capacitors C1 and C2 are DC blocking capacitors. A reactive impedance match can be implemented by replacing R1 with an inductor and C1 and C2 with appropriately-valued capacitors . R1 = 52.3 Ω (Size 0402) C1 = 1 nF (Size 0402) C2 = 1 nF (Size 0402) R2 Temperature Sensor Interface: The temperature sensor output voltage is available at J1, via the current limiting resistor, R2. C4 Temperature Compensation Interface: The internal temperature compensation resistor is optimized for an input signal of 2.2 GHz when C4 is 1 k Ω. This circuit can be adjusted to optimize performance for other input frequencies by changing the value of the resistor in position C4. Note that the designation C4 on the evaluation board is a typographical error as this pad will always be populated with a resistor. This error will be corrected on the Rev B revision of the board. C4 = 500 k Ω (Size 0603) R7, R8, R9, R10 Output Interface—Measurement Mode: In measurement mode, a portion of the output voltage is fed back to pin VSET via R7. The magnitude of the slope of the VOUT output voltage response may be increased by reducing the portion of VOUT that is fed back to VSET. R10 can be used as a back- terminating resistor or as part of a single-pole low-pass filter. R7 = 0 Ω = (Size 0402) R8 = open (Size 0402) R9 = open (Size 0402 R10= 0 Ω (Size 0402) R7, R8, R9, R10 Output Interface—Controller Mode: In this mode, R7 must be open. In controller mode, the AD8318 can control the gain of an external component. A setpoint voltage is applied to pin VSET, the value of which corresponds to the desired RF input signal level applied to the AD8318 RF input. A sample of the RF output signal from this variable-gain component is selected, typically via a directional coupler, and applied to AD8318 RF input. The voltage at pin VOUT is applied to the gain control of the variable gain element. A control voltage is applied to pin VSET via R9 and R8. The magnitude of the control voltage may optionally be attenuated via the voltage divider comprised of R8 and R9, or a capacitor may be installed in position R8 to form a low-pass filter along with R9. R7 = open (Size 0402) R8 = open (Size 0402) R9 = 0 Ω (Size 0402) R10 = 0 Ω (Size 0402) C5, C6, C7, C8, R5, R6 Power Supply Decoupling: The nominal supply decoupling consists of a 100 pF filter capacitor placed physically close to the AD8318, a 0 Ω series resistor and a 0.1 µF capacitor placed nearer to the power supply input pin. C6 = 100 pF (Size 0402) C7 = 100 pF (Size 0402) C5 = 0.1 µF (Size 0603) C8 = 0.1 µF (Size 0603) R5 = 0 Ω (Size 0603) R6 = 0 Ω (Size 0603) C9 Filter Capacitor: The low-pass corner frequency of the circuit that drives pin VOUT can be lowered by placing a capacitor between CLPF and ground. C4 = open (Size 0603) |
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