AD9558 datasheet(73/105 Pages) AD

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Data Sheet

AD9558

Rev. C | Page 73 of 105

SERIAL PORT CONFIGURATION (REGISTER 0x0000 TO REGISTER 0x0005)

Table 36. Serial Configuration (Note that the Contents of Register 0x0000 are Not Stored to the EEPROM)

Address

Bits

Bit Name

Description

0x0000

SDO enable

Enables SPI port SDO pin.

1 = 4-wire (SDO pin enabled).

0 (default) = 3-wire.

LSB first/increment

address

Bit order for SPI port.

1 = least significant bit and byte first. Register addresses are automatically incremented in

multibyte transfers.

0 (default) = most significant bit and byte first. Register addresses are automatically

decremented in multibyte transfers.

Soft reset

Device reset (invokes an EEPROM download or pin program ROM download if EEPROM or

pin program is enabled. See the EEPROM and Pin Configuration and Function Descriptions

sections for details.

[4:0]

Reserved

Reserved.

Table 37. Readback Control

Address

Bits

Bit Name

Description

0x0004

[7:1]

Reserved

Reserved.

Read buffer register

For buffered registers, serial port readback reads from actual (active) registers instead of

the buffer. As with all live registers, an I/O update is not needed when setting this bit.

1 = reads buffered values that take effect on next assertion of I/O update.

0 (default) = reads values currently applied to the internal logic of the device.

Table 38. Soft I/O Update

Address

Bits

Bit Name

Description

0x0005

[7:1]

Reserved

Reserved.

I/O update

Writing a 1 to this bit transfers the data in the serial I/O buffer registers to the internal

control registers of the device. Unless a register is marked as live (as indicated by an L in

the Opt column of the register map), the user must write to this bit before any register

settings can take effect and before a read-only register can be updated with the most current

value. This is an autoclearing bit.

Table 39. User Scratch Pad

Address

Bits

Bit Name

Description

0x0006

[7:0]

User scratch pad[7:0]

User programmable EEPROM ID registers. These registers enable users to write a unique

code of their choosing to keep track of revisions to the EEPROM register loading. It has no

effect on device operation. 0 = default.

0x0007

[7:0]

User scratch pad[15:8]

SILICON REVISION (REGISTER 0x000A)

Table 40. Silicon Revision

Address

Bits

Bit Name

Description

0x000A

[7:0]

Silicon revision

This read-only register identifies the revision level of the AD9558.

CLOCK PART SERIAL ID (REGISTER 0x000C TO REGISTER 0x000D)

Table 41. Clock Part Family ID

Address

Bits

Bit Name

Description

0x000C

[7:0]

Clock part family ID[7:0]

This read-only register (along with Register 0x000D) uniquely identifies an AD9557 or

AD9558. No other device in the Analog Devices AD95xx family has a value of 0x0001 in these

two registers.

Default: 0x01 for the AD9557 and AD9558.

0x000D

[7:0]

Clock part family ID[15:8]

This register is a continuation of Register 0x000C.

Default: 0x00 for the AD9557 and AD9558.

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