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CPC5750 Datasheet(PDF) 5 Page - IXYS Corporation |
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CPC5750 Datasheet(HTML) 5 Page - IXYS Corporation |
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5 / 37 page  PRELIMINARY INTEGRATED CIRCUITS DIVISION Rev F PRELIMINARY 5 CPC5750 1.6 Analog Interface Characteristics 1 Not tested, guaranteed by design. Power supply rejection is evaluated for sample parts. Parameter Conditions Symbol Minimum Typical Maximum Units Inputs Input Offset Voltage: AIN+ and AIN- PD = 0 VIN ½ VCC V PD = 1 0 Input Impedance Differential - RAIN+/- 160 200 240 k Input to Ground (VEE) - RAIN - 100 - k Maximum Differential Input Signal Referenced to 600 - -- +8 dBm Differential Common Mode Rejection Ratio Relative to -26dBm0, 0 to 3.6kHz - 60 - - dB Differential Power Supply Rejection Ratio 1 RAIN+/- = Open 0 to 3.6kHz - 60 dB Outputs Output Offset Voltage: AOUT+ and AOUT- PD = 0, MUTE = x VOUT ½ VCC V PD = 1 0 Output drive RL = 500 3.2 mAp Maximum Output Signal Referenced to 600 --- 3.2 dBm Differential Load Impedance - - 500 600 - Load Capacitance Differential - CLD - - 250 pF To GND - CL -- 50 pF Differential Power Supply Rejection Ratio 1 0 to 3.6kHz -60- - dB |
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