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ADF4196 Datasheet(PDF) 9 Page - Analog Devices |
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ADF4196 Datasheet(HTML) 9 Page - Analog Devices |
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9 / 28 page ![]() Data Sheet ADF4196 Figure 10. VTUNE Settling Transient for a 75 MHz Jump from 1818 MHz to 1893 MHz with Sirenza 1843T VCO Figure 11. Phase Settling Transient for a 75 MHz Jump from 1818 MHz to 1893 MHz (VTUNE = 1.8 V to 3.7 V with Sirenza 1843T VCO) Figure 12. Differential Charge Pump Output Compliance Range and Charge Pump Mismatch with VP1 = VP2 = 5 V Figure 13. VTUNE Settling Transient for a 75 MHz Jump Down from 1893 MHz to 1818 MHz (Bottom of Allowed Tuning Range) with Sirenza 1843T VCO Figure 14. Phase Settling Transient for a 75 MHz Jump Down from 1893 MHz to 1818 MHz (VTUNE = 3.7 V to 1.8 V with Sirenza 1843T VCO) Figure 15. Tuning Range with a Sirenza 1843T VCO and a 5.5 V Differential Amplifier Power Supply Voltage TIME (µs) –1 0 1 2 3 4 5 9 8 7 6 5 4 3 2 1 0 VTUNE CPOUT+ CPOUT– DCS1800 Tx SETUP, 60kHz LOOP BW. MEASURED ON EVAL-ADF4193EBZ1 EVALUATION BOARD. TIMERS: ICP = 28, SW1/SW2, SW3 = 35. FREQUENCY LOCK IN WIDE BW MODE @ 4µs. TIME (µs) –5 0 5 10 15 20 25 30 35 40 –50 50 40 30 20 10 0 –10 –20 –30 –40 45 +25°C +85°C –40°C DCS1800 Tx SETUP, 60kHz LOOP BW. MEASURED ON EVAL-ADF4193EBZ1 EVALUATION BOARD WITH AD8302 PHASE DETECTOR. TIMERS: ICP = 28, SW1/SW2, SW3 = 35. PEAK PHASE ERROR < 5° @ 17.8µs CPOUT + / CPOUT – VOLTAGE (V) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 –8 –6 –4 –2 0 2 4 6 8 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 5.0 ICPOUT + P, ICPOUT – P CHARGE PUMP MISMATCH (%) NORMAL OPERATING RANGE ICPOUT + N, ICPOUT – N IUP = | ICPOUT + P | + | ICPOUT – N | IDOWN = | ICPOUT – P | + | ICPOUT + N | TIME (µs) –1 0 1 2 3 4 5 9 8 7 6 5 4 3 2 1 0 VTUNE CPOUT– CPOUT+ DCS1800 Tx SETUP, 60kHz LOOP BW. MEASURED ON EVAL-ADF4193EBZ1 EVALUATION BOARD. TIMERS: ICP = 28, SW1/SW2, SW3 = 35. FREQUENCY LOCK IN WIDE BW MODE @ 5µs. TIME (µs) –5 0 5 10 15 20 25 30 35 40 –50 50 40 30 20 10 0 –10 –20 –30 –40 45 +25°C +85°C –40°C DCS1800 Tx SETUP, 60kHz LOOP BW. MEASURED ON EVAL-ADF4193EBZ1 EVALUATION BOARD WITH AD8302 PHASE DETECTOR. TIMERS: ICP = 28, SW1/SW2, SW3 = 35. PEAK PHASE ERROR < 5° @ 19.2µs FREQUENCY (MHz) 1780 1800 1820 1840 1860 1880 1900 1920 1940 0 2 1 3 4 5 VP1 = VP2 = 5V VP3 = 5.5V VCMR = 3.3V CPOUT– (= AIN–) AOUT (= VTUNE) CPOUT+ (= AIN+) Rev. D | Page 9 of 28 |
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