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RSC4128 Datasheet(PDF) 29 Page - List of Unclassifed Manufacturers

Part # RSC4128
Description  Speech Recognition Processor
PDF  49 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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RSC4128 Datasheet(HTML) 29 Page - List of Unclassifed Manufacturers

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Data Sheet
RSC-4128
29
P/N 80-0206-J
© 2004 Sensory Inc.
Full-Scale Mode (Output range 0v to Vdd- 1 LSB)
Decimal
DAC hold
Analog Cntrl
Digital input
Analog Voltage output
Equivalent
reg[7:0] (hex)
[5:4] (binary)
General
0-3V (approx)
-512
80H
00
000H
0V
0.000V
-511
80H
01
001H
0V+ 1 LSB
0.003V
-510
80H
10
002H
0.006V
-509
80H
11
003H
0.009V
-508
81H
00
004H
0.012V
-2
FFH
10
1FEH
-1
FFH
11
1FFH
Vdd/2- 1 LSB
1.497V
0
00H
00
200H
Vdd/2
1.500V
+1
00H
01
201H
Vdd/2+ 1LSB
1.503V
+2
00H
10
202H
+3
00H
11
203H
+4
01H
00
204H
+510
7FH
10
3FEH
2.994V
+511
7FH
11
3FFH
Vdd- 1LSB
2.997V
The translation in Full-Scale mode is:
R2R[9] = dac[7] inverted
R2R[8:2] = dac[6:0]
R2R[1:0] = anCtl[5:4]
Half-Scale Mode (Output range Vdd/4 to 3Vdd/4- 1 LSB)
Decimal
DAC hold
Analog Cntrl
Digital Input
Analog Voltage output
Equivalent
reg[7:0] (hex)
[5:4] (binary)
General
0-3V (approx)
-256
80H
0x
100H
Vdd/4
0.750V
-255
80H
1x
101H
Vdd/4+ 1 LSB
0.753V
-254
81H
0x
102H
0.756V
-253
81H
1x
103H
0.759V
-252
82H
0x
104H
0.762V
-2
FFH
0x
1FEH
-1
FFH
1x
1FFH
Vdd/2- 1LSB
1.497V
0
00H
0x
200H
Vdd/2
1.500V
+1
00H
1x
201H
Vdd/2+ 1LSB
1.503V
+2
01H
0x
202H
+3
01H
1x
203H
+4
02H
0x
204H
+254
7FH
0x
2FEH
2.244V
+255
7FH
1x
2FFH
3Vdd/4-1 LSB
2.247V
The translation in Half-Scale mode is:
R2R[9] = dac[7] inverted
R2R[8:1] = dac[7:0]
R2R[0] = anCtl[5]
DAC Power Control
The DAC has no explicit power control. It is turned off (placed into lowest current mode) by loading the value 80H
into the DAC hold register, and 0 into the LSB1 and LSB0 bits of the Analog Control Register (register EF.Bits[5:4]).
Note: register EF.Bit7 (“-anCtl” must be “0” in the value being written to register EF, when writing
EF.Bits[5:0].



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