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RSC4128 Datasheet(PDF) 35 Page - List of Unclassifed Manufacturers |
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RSC4128 Datasheet(HTML) 35 Page - List of Unclassifed Manufacturers |
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35 / 49 page ![]() Data Sheet RSC-4128 35 P/N 80-0206-J © 2004 Sensory Inc. Instruction Opcode Operand 1 Operand 2 Description Bytes Cycles +Cycles/Waitstate AND 40 dest source logical and 3 6 3 TM 41 dest source like AND, destination register unchanged 3 6 3 OR 42 dest source logical or 3 6 3 XOR 43 dest source exclusive or 3 6 3 SUB 44 dest source subtract 3 6 3 CP 45 dest source like SUB, destination register unchanged 3 6 3 SUBC 46 dest source subtract w/carry 3 6 3 ADD 47 dest source add 3 6 3 ADC 48 dest source add w/carry 3 6 3 INC 49 dest - increment 2 5 2 DEC 4A dest - decrement 2 5 2 AND 50 dest #immed logical and 3 5 3 TM 51 dest #immed like AND, destination register unchanged 3 5 3 OR 52 dest #immed logical or 3 5 3 XOR 53 dest #immed exclusive or 3 5 3 SUB 54 dest #immed subtract 3 5 3 CP 55 dest #immed like SUB, destination register unchanged 3 5 3 SUBC 56 dest #immed subtract w/carry 3 5 3 ADD 57 dest #immed add 3 5 3 ADC 58 dest #immed add w/carry 3 5 3 INCD 69 dest_pair & source_pair - register pair 16-bit increment 2 8 2 CPD 66 dest_pair source_pair 16-bit compare 3 10 3 MISCELLANEOUS Group Instructions Instruction Opcode Operand 1 Operand 2 Description Bytes Cycles +Cycles/Waitstate NOP 00 - - no operation 1 2 1 CLC 01 - - clear carry 1 2 1 STC 02 - - set carry 1 2 1 CMC 03 - - complement carry 1 2 1 CLI 04 - - disable interrupts 1 2 1 STI 05 - - enable interrupts 1 2 1 WDC 06 - - enable/restart Watchdog timer 1 2 1 |
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