RSC4128 datasheet(11/49 Pages) ETC

11 / 49 page

Data Sheet

RSC-4128

P/N 80-0206-J

Stack

There is a 16-level, 16-bit stack for saving the program counter for subroutine calls and interrupt requests. The

stack pointer wraps around on overflow or underflow. When the stack read and write pointers indicate that stack

overflow has occurred, the “stkoflo” bit in the “flags” register is set. Once set, this bit can only be cleared by a

processor reset. The bit may be tested by software, but it performs no other function. When the stack read and

write pointers indicate that stack is full, the “stkfull” bit in the “flags” register is set. This bit will be reset once the

stack is not full.

Stack Pointers

The 16-level stack has two 4-bit pointers, stack write and stack read. They are normally written by the processor

upon execution of a “CALL” instruction or an interrupt.

The stack also has a 6-bit index register “stkNdx” (register F6) and an 8-bit data port register “stkData” (register F7)

that are used to access the stack contents as bytes in a register file under program control. The contents of the

stack location selected by the “stkNdx” register may be read or written by the processor via MOV instructions at the

“stkData” register. The stack register index must be written first, then the stack data can be read.

The Stack read and write pointers (4 bits each) are also mapped to addresses accessible via the Stack Register

Index.

Stack contents accessed by value in stack register index (“stkNdx”, register F6)

00H

Stack0 Lo

08H

Stack4 Lo

10H

Stack8 Lo

18H

StackC Lo

01H

Stack0 Hi

09H

Stack4 Hi

11H

Stack8 Hi

19H

StackC Hi

02H

Stack1 Lo

0AH

Stack5 Lo

12H

Stack9 Lo

1AH

StackD Lo

03H

Stack1 Hi

0BH

Stack5 Hi

13H

Stack9 Hi

1BH

StackD Hi

04H

Stack2 Lo

0CH

Stack6 Lo

14H

StackA Lo

1CH

StackE Lo

05H

Stack2 Hi

0DH

Stack6 Hi

15H

StackA Hi

1DH

StackE Hi

06H

Stack3 Lo

0EH

Stack7 Lo

16H

StackB Lo

1EH

StackF Lo

07H

Stack3 Hi

0FH

Stack7 Hi

17H

StackB Hi

1FH

StacKF Hi

20-

2FH

(unused)

30-

3DH

(unused)

3EH

StackWritePtr

(4bits only)

3FH

StackReadPtr

(4bits only)

The RSC-4128 has a total physical register RAM space of 896 bytes, divided into 14 banks of 64 bytes each. There

is an additional 64 bytes of Special Function Registers (SFRs). Two of the register RAM banks are directly

addressed as unbanked memory, and the other 12 banks are banked.

Addressing 896 bytes requires an address width of 10 bits. (architecturally, an 11 bit address is implemented to

allow for future increases in the register RAM). Logical register space addresses are 8 bits only (256 bytes), so 5

bank select bits in the “bank” register (register FC) are used so to access the full 896 bytes. The 256 byte logical

000H-03FH

unbanked register RAM

040H-07FH

unbanked register RAM

080H-0BFH

banked register RAM

0C0H-0FFH

SFRs

Bits [4:0] of the “bank” register determine which physical bank of 64 bytes is logically mapped to addresses 080H-

0BFH. When an address falls in the logically mapped range of 080H-0BFH, the lower 6 bits of the address (64 byte

address) are used directly and the bank select bits are used as the upper 5 bits of the 11-bit physical register RAM

address. When the address falls below the logically mapped range of 080H-0BFH, the lower 8 bits of the address

are used directly to address the unbanked register RAM. When the address falls in the logically mapped range for

the SFRs (0C0H-0FFH) the SFRs are addressed, not the register RAM.

RSC4128 Datasheet(PDF) 11 Page - List of Unclassifed Manufacturers

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