AD5767 datasheet(19/43 Pages) AD

19 / 43 page

Data Sheet

AD5766/AD5767

Rev. C | Page 19 of 43

–4

–2

–6

–20

–10

TIME (µs)

±5V RANGE

AVDD/AVSS = RANGE ± 2V

AVCC = 3.3V

TA = 25°C

Figure 25. Full-Scale Settling Time (Rising Voltage Step)

–4

–2

–6

–20

–10

TIME (µs)

±5V RANGE

AVDD/AVSS = RANGE ± 2V

AVCC = 3.3V

TA = 25°C

Figure 26. Full-Scale Settling Time (Falling Voltage Step)

–10

–5

–15

–0.06

0.06

0.04

–0.02

0.02

–0.04

VOUT CURRENT OUTPUT (A)

–12V TO +14V

–20V TO 0V

AVDD/AVSS = RANGE ± 2V

AVCC = 3.3V

TA = 25°C

Figure 27. Source and Sink Capability of Output Amplifier

0.05

–0.10

–0.09

–0.08

–0.07

–0.06

–0.05

–0.04

–0.03

–0.02

–0.01

0.01

0.02

0.03

0.04

–20

–10

TIME (µs)

±5V RANGE

AVDD/AVSS = RANGE ± 2V

AVCC = 3.3V

10nF

1nF

Figure 28. Output Voltage (VOUT) vs. Settling Time at Various Capacitive Loads

0.2

0.4

0.6

0.8

1.0

OUTPUT CURRENT (mA)

AVCC = 3.3V

CODE: FULL-SCALE

TA = 25°C

Figure 29. Headroom vs. Output Current

–1.0

–0.8

–0.6

–0.4

–0.2

–20

–18 –16 –14 –12

–10

–8

–6

–4

–2

OUTPUT CURRENT (mA)

AVCC = 3.3V

CODE: ZERO SCALE

TA = 25°C

Figure 30. Footroom vs. Output Current

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