AD5767 datasheet(3/43 Pages) AD

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Data Sheet

AD5766/AD5767

Rev. C | Page 3 of 43

REVISION HISTORY

1/2018—Rev. B to Rev. C

Changes to Output Voltage Settling Time Parameter, Table 3 .........8

Changes to Figure 6.........................................................................14

Changes to Figure 11 ......................................................................16

Changes to Figure 13 ......................................................................17

Changes to Figure 37 ......................................................................21

Change to Terminology Section....................................................27

Changes to Figure 72 ......................................................................32

Changes to Ordering Guide...........................................................43

10/2017—Rev. A to Rev. B

Added AD5766...................................................................Universal

Changes to Features Section, Applications Section, and

General Description Section............................................................1

Changes to Table 1 ............................................................................4

Added Table 2; Renumbered Sequentially.....................................7

Changes to Table 3 ............................................................................8

Changes to t14 and t15 Parameters, Table 4 and Figure 2...............9

Changes to Figure 4.........................................................................10

Change to AVCC Pin Description, Table 7 ....................................13

Change to AVCC Pin Description, Table 8 ....................................15

Changes to Figure 7 to Figure 12...................................................16

Changes to Figure 13 to Figure 18 ................................................17

Deleted Figure 30; Renumbered Sequentially .............................17

Added Figure 19 to Figure 24; Renumbered Sequentially.........18

Added Figure 29 and Figure 30 .....................................................19

Added Figure 31 to Figure 36 ........................................................20

Added Figure 37 to Figure 42 ........................................................21

Added Figure 43 and Figure 46 .....................................................22

Changes to Figure 49 ......................................................................23

Added Figure 50 to Figure 54 ........................................................23

Changes to Figure 56 ......................................................................24

Added Figure 67 ..............................................................................26

Changes to Digital-to-Analog Converter Section, DAC

Architecture Section, and Power-On Reset (POR) Section..........29

Added Figure 70 ..............................................................................30

Changes to Dither Section and Dither Power-Down Mode

Section ..............................................................................................31

Changes to Table 10 ........................................................................33

Added Table 17 and Table 19.........................................................35

Changes to Dither Power Control Register Section, Table 26, Write

Input Data to All DAC Registers Section, and Table 28 ...............36

Changes to Table 32 and Table 33.................................................37

Changes to Dither Configuration Section ...................................40

Updated Outline Dimensions........................................................42

Changes to Ordering Guide...........................................................43

4/2017—Rev. 0 to Rev. A

Added 40-Lead LFCSP Package....................................... Universal

Changes to Features ..........................................................................1

Changes to General Description.....................................................1

Changes to Functional Block Diagram, Figure 1..........................1

Added Figure 6 and Added Table 7; Renumbered

Sequentially......................................................................................12

Changes to Figure 23 and Figure 24 .............................................16

Added Figure 26..............................................................................17

Changes to Figure 28 and Figure 29 .............................................17

Changes to Dither DC Shift Section.............................................20

Changes to Figure 43, Caption Only ............................................23

Changes to Input Shift Register Section and Table 9 .................25

Changes to Table 18 ........................................................................27

Changes to Thermal Considerations Section..............................32

Changes to Layout Guidelines Section and Added Figure 47...33

Updated Outline Dimensions........................................................34

Changes to Ordering Guide...........................................................35

1/2017—Revision 0: Initial Version

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