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IP175G Datasheet(PDF) 43 Page - List of Unclassifed Manufacturers

Part # IP175G
Description  5 Port 10/100 Ethernet Integrated Switch
PDF  69 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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IP175G Datasheet(HTML) 43 Page - List of Unclassifed Manufacturers

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IP175G/GI/GH/GHI
Data Sheet
43 / 69
November 27, 2012
Copyright © 2012, IC Plus Corp.
IP175Gx-DS-R01.3
page
MII
R/W
Description
Default
16.[9]
RW
Sense DUT
Set high to enable WOL+ interrupt when DUT is sensing WOL+
event.
1=Enable
0=Disable
Each PHY address can access the register of the corresponding
port.
1
16.[8]
RW
WOL+ Down Speed Enable
Set high to enable WOL+ down speed function
1=Enable
0=Disable
1
16.[7:1]
RO
Reserved
0x00
16.[0]
RO
PHY WOL+ Interrupt Status
The status of PHY WOL+ interrupt is based on the setting of
Reg16 Page4 Bit14 and Bit13.
1
MII page5 register16 of PHY0 (5 PHYs share the MII register)
page
MII
R/W
Description
Default
PHY WOL+ MAC Address Register 0
5
16[15:0]
R/W
WOL+ MAC Address 0 (the most significant word)
WOL+ MAC Address = {WOL+_MAC_Address_0,
WOL+_MAC_Address_1, WOL+_MAC_Address_2}
0x0000
MII page6 register16 of PHY0 (5 PHYs share the MII register)
page
MII
R/W
Description
Default
PHY WOL+ MAC Address Register 1
6
16[15:0]
R/W
WOL+ MAC Address 1
WOL+ MAC Address = {WOL+_MAC_Address_0,
WOL+_MAC_Address_1, WOL+_MAC_Address_2}
0x0000
MII page7 register16 of PHY0 (5 PHYs share the MII register)
page
MII
R/W
Description
Default
PHY WOL+ MAC Address Register 2
7
16[15:0]
R/W
WOL+ MAC Address 2 (the least significant word)
WOL+ MAC Address = {WOL+_MAC_Address_0,
WOL+_MAC_Address_1, WOL+_MAC_Address_2}
0x0000
The other Registers are reserved registers. User is inhibited to access to these registers. It may
introduce abnormal function to write these registers.
Example 1, Read page3 register16 (Read Data from page3 register16 of PHY address 2):
1.
Write 2.20 = 0x0003 //page3
2.
Read 2.16
//Read Data from page3 register16
3.
Write 2.20 = 0x0000 //restore to page0
Example 2, Write page3 register16 = 0x3400 (Write Data 0x3400 to page3 register16 of PHY address 2):
1.
Write 2.20 = 0x0003 //page3
2.
Write 2.16 = 0x3400 //Write Data 0x3400 to page3 register16
3.
Write 2.20 = 0x0000 //restore to page0



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