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RF68 Datasheet(PDF) 19 Page - HOPE Microelectronics CO., Ltd. |
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RF68 Datasheet(HTML) 19 Page - HOPE Microelectronics CO., Ltd. |
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19 / 21 page ![]() Page 19 RF68 Tel: + 86-755-82973805 Fax: + 86-755-82973550 E-mail: sales@hoperf.com http:/ / www.hoperf.com Notes - The matching centered at 350 MHz offers a flat performance from 315 to 390 MHz, but could be modified to slightly improve efficiency at any frequency inbetween - The 915 MHz @10dBm BOM is dedicated to systems running under CFR Part 15.247, either FHSS or DTS mode - The 915 MHz @0dBm BOM is dedicated to systems running under CFR Part 15.249 6.3. NRESET Pin When required, the pin NRESET can be controlled externally, to allow for: either a delayed Power On Reset (POR) cycle of the RF68, allowing for the companion micro to reset and assign its port directions. This is achieved by connecting a R/C time constant to the NRESET pin. or an On-the-go Reset of the RF68 at any moment in time, if required by the application. This is achieved by pulling the NRESET pin low for more than 100 microseconds, then releasing it to high impedance (normal termination). 6.4. TX_READY Pin For timing critical applications, TX_READY pin can be useful to know precisely when the transmitter is ready for operation, and therefore save energy. To this end, TX_READY can optionally be connected to inform the companion device that the PA ramp up phase has been terminated, hence the RF68 is ready for data transmission. 6.5. Low Power Optimization The RF68 is designed to reduce the cost of the RF transmitter functionnality. To this end, a single DATA signal can be enough to operate the transmitter, in any of the two Power & Go modes. In this situation, TS_START and TOFFT timings, tabulated in Section 2.4, must be respected, leading to significant periods of time during which the transmitter is On and no valuable information is transmitted. For more demanding applications where energy usage is critical, the RF68 offers hardware and software support to accurately control the transmitter On time, and therefore save energy: 6.5.1. 2 Connections: CTRL, DATA If the two signals of the TWI interface can be controlled by the host microcontroller, Tx On time can be accurately controlled as follows: At the device turn on, instead of waiting for TS_TR (2ms max, but very XTAL dependant), the status flag TX_READY can be polled on the TWI interface. As soon as the TX_READY flag is set, the microcontroller can start toggling DATA to transmit the useful packet. This method is valid in both Forced Tx and Automatic modes. At the device turn off, instead of waiting for TOFFT (2 or 20ms), the user can immediately turn off the transmitter after the transmission of packet, assuming that the Forced Transmit mode was selected. 6.5.2. 3 Connections: CTRL, DATA, TX_READY In applications where the number of connections between the microcontroller and the RF chip is less critical, TX_READY pin can be connected to either a GPIO port, or an external interrupt port of the micro. The two optimizations described in the former subsection will also be possible. |
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