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AD5940 Datasheet(PDF) 19 Page - Analog Devices

Part # AD5940
Description  High Precision, Impedance, and Electrochemical Front End
PDF  130 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5940 Datasheet(HTML) 19 Page - Analog Devices

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Data Sheet
AD5940
Rev. 0 | Page 19 of 130
Pin No.
Mnemonic
Input/Output
Supply
Description
B8
RC0_1
Analog
Low Power TIA Reconstruction Filter 0 Feedback Pin 1. This pin is connected to the
output of the low power TIA.
C1
RCAL0
Analog
Terminal A of Calibration Resistor. Connect this pin to the switch matrix.
C2
AFE2
Analog
Uncommitted Analog Front End Pin 2.
C3, D3
DNC
Analog
Do Not Connect. Do not connect to this pin.
C4
AGND
Ground
Analog Ground. Short this pin to Pin E3 (AGND).
C5
AIN6
Analog
Uncommitted Analog Input Pin 6.
C6
RC0_2
Analog
Low Power TIA Reconstruction Filter 0 Pin 2. This pin can be left open (optional).
C7
VBIAS0
Analog
Low Power, Dual-Output DAC Bias Voltage Output Pin.
C8
RC0_0
Analog
Low Power TIA Feedback Pin. This pin is connected to the feedback of the low
power TIA.
D1
VBIAS_CAP
Analog
VBIAS0 Decoupling Capacitor Pin.
D2
AIN0
Analog
Uncommitted Analog Input Pin 0. This pin connects to the switch matrix.
D4, G1, G8
DNC
Not applicable
Do Not Connect. Do not connect to this pin.
D5
AGND_REF
Ground
Analog Reference Ground.
D6
GPIO1
Digital
input/output
General-Purpose Input/Output Pin 1.
D7
VREF_2V5
Analog
2.5 V Analog Reference Decoupling Capacitor Pin.
D8
AVDD_REG
Supply
Analog Regulator Decoupling Capacitor Pin.
E1
GPIO2
Digital
input/output
General-Purpose Input/Output Pin 2.
E2
GPIO3
Digital
input/output
General-Purpose Input/Output Pin 3.
E3
AGND
Ground
Analog Ground. Short this pin to Pin C4.
E4 to E6
DGND
Ground
Digital Ground
E7
MOSI
Digital input
SPI Master Output, Slave Input.
E8
MISO
Digital output
SPI Master Input Slave Output.
F1
RESET
Digital input
Reset Pin, Active Low.
F2
AVDD
Supply
Analog 3.3 V Circuit Power.
F3
DVDD
Supply
Digital Circuit Power.
F4
GPIO6
Digital
input/output
General-Purpose Input/Output Pin 6.
F5
GPIO0
Digital
input/output
General-Purpose Input/Output Pin 0.
F6
GPIO5
Digital
input/output
General-Purpose Input/Output Pin 5.
F7
CS
Digital
input/output
SPI Chip Select.
F8
SCLK
Digital input
SPI Clock.
G2
IOVDD
Supply
Digital Input/Output Supply Pin. DVDD (Pin F3) must be driven before IOVDD is enabled.
G3
DVDD_REG_1V8
Analog
1.8 V Digital Regulator Decoupling Capacitor Pin.
G4
GPIO7
Digital
input/output
General-Purpose Input/Output Pin 7.
G5
XTALI
Digital Input
16 MHz External Crystal Input Pin.
G6
XTALO
Digital Output
16 MHz External Crystal Output Pin.
G7
GPIO4
Digital
input/output
General-Purpose Input/Output Pin 4.



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