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AD7739 Datasheet(PDF) 20 Page - Analog Devices

Part # AD7739
Description  8-Channel, High Throughput, 24-Bit Sigma-Delta ADC
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7739 Datasheet(HTML) 20 Page - Analog Devices

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AD7739
Rev. 0 | Page 20 of 32
CHANNEL CONVERSION TIME REGISTERS
8 Bits, Read/Write Registers, Address 0x30–0x37h, Default Value 0x91
The conversion time registers enable or disable chopping and configure the digital filter for a particular channel. This register value affects
the conversion time, frequency response, and noise performance of the ADC.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
CHOP
FW (7-Bit Filter Word)
Default
1
0x11
Bit
Mnemonic
Description
7
CHOP
Chopping Enable Bit. Set to 1 to apply chopping mode for a particular channel.
6–0
FW
CHOP = 1, single conversion or continuous conversion with one channel enabled.
Conversion Time (µs) = (FW × 128 + 262)/MCLK Frequency (MHz), the FW range is 2 to 127.
CHOP = 1, continuous conversion with two or more channels enabled.
Conversion Time (µs) = (FW × 128 + 263)/MCLK Frequency (MHz), the FW range is 2 to 127.
CHOP = 0, single conversion or continuous conversion with one channel enabled.
Conversion Time (µs) = (FW × 64 + 213)/MCLK Frequency (MHz), the FW range is 3 to 127.
CHOP = 0, continuous conversion with two or more channels enabled.
Conversion Time (µs) = (FW × 64 + 214)/MCLK Frequency (MHz), the FW range is 3 to 127.
MODE REGISTER
8 Bits, Read/Write Register, Address 0x38–0x3F, Default Value 0x00
The mode register configures the part and determines its operating mode. Writing to the mode register clears the ADC status register, sets
the RDY pin to a logic high level, exits all current operations, and starts the mode specified by the mode bits.
The AD7739 contains only one mode register. The two LSBs of the address are used for writing to the mode register to specify the channel
selected for the operation determined by the MD2 to MD0 bits. Only the address 0x38 must be used for reading from the mode register.
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mnemonic
MD2
MD1
MD0
CLKDIS
DUMP
Cont RD
24/16 BIT
CLAMP
Default
0
0
0
0
0
0
0
0
Bit
Mnemonic
Description
7–5
MD2–MD0
Mode Bits. These three bits determine the AD7739 operation mode. Writing a new value to the mode bits will
exit the part from the mode in which it has been operating and place it in the newly requested mode
immediately. The function of the mode bits is described in more detail below.
MD2
MD1
MD0
Mode
Address Used for Mode Register
Write Specifies:
0
0
0
Idle
0
0
1
Continuous Conversion
First Channel to Start Converting
0
1
0
Single Conversion
Channel to Convert
0
1
1
Power-Down (Standby)
1
0
0
ADC Zero-Scale Self-Calibration
Conversion Time for Calibration
1
0
1
ADC Full-Scale Self-Calibration (for 2.5 V)
Conversion Time for Calibration
1
1
0
Channel Zero-Scale System Calibration
Channel to Calibrate
1
1
1
Channel Full-Scale System Calibration
Channel to Calibrate



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