THS4541 datasheet(32/64 Pages) TI1

32 / 64 page

Rf1

402

Rload

500

Rg1

191

Rg2

191

60.2

Output

Measurement

Point

THS4541 Wideband,

Fully-Differential Amplifier

50-

Input Match,

Gain of 2 V/V from Rt,

Single-Ended Source to

Differential Output

Vocm

Rf2

402

Vcc

Vocm

Vcc

FDA

Ro1

Ro2

Cload

22 pF

50-

Source

THS4541-Q1

SLOS930B – NOVEMBER 2015 – REVISED NOVEMBER 2019

www.ti.com

Product Folder Links: THS4541-Q1

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8.7 Driving Capacitive Loads

A very common requirement is driving the capacitive load of an ADC or some other next stage device. Directly

driving a capacitive load with a closed-loop amplifier such as the THS4541-Q1 can lead to an unstable response,

as shown in the step response plots into a capacitive load (see Figure 8 and Figure 26). One typical remedy for

this instability is to add two small series resistors (Ro in Figure 71) at the outputs of the THS4541-Q1. Figure 6

and Figure 24 provide parametric plots of recommended Ro values versus differential capacitive load values and

gain.

Figure 71. Including Ro when Driving Capacitive Loads

Operating at higher gains requires lower Ro values to achieve a ±0.5-dB flat response for the same capacitive

load. Some direct parasitic loading is acceptable with no series Ro that increases with gain setting, as illustrated

in Figure 6 and Figure 24 where the Ro value is 0 Ω. Even when these plots suggest no series Ro is required,

good practice is to include a place for the Ro elements in the board layout (0-Ω load initially) for later adjustment,

in case the response appears unacceptable. The TINA simulation model does a good job of predicting this effect

and showing the impact for different choices of capacitive load isolating resistors (Ro).

8.8 Thermal Analysis

The relatively low internal quiescent power dissipation for the THS4541-Q1, combined with the excellent thermal

impedance of the 16-pin VQFN (RGT) package, limits the possibility of excessively-high, internal-junction

temperatures.

To estimate the internal junction temperature (TJ), an estimate of the maximum internal power dissipation (PD) is

first required. There are two pieces to the internal power dissipation: quiescent current power and the power

used in the output stage to deliver load current. To simplify the latter, the worst-case, output-stage power is

driving a DC differential voltage across a load using half the total supply voltage. As an example:

1. Assume a worst-case, 5% high 5-V supply. This 5.25-V supply with a maximum ICC of 11 mA gives a

quiescent power term = 58 mW.

2. Assume a 100-Ω differential load with a static 2.5-V differential voltage established across it. This 25 mA of

DC load current generates a maximum output stage power of (5.25 V – 2.5 V) × 25 mA = 69 mW.

3. From this total worst-case internal PD = 127 mW, multiply times the 52°C/W thermal impedance to get a 7°C

rise from ambient.

Even for this extreme condition and the maximum rated ambient temperature of 125°C, the junction temperature

is a maximum 132°C (less than the rated absolute maximum of 150°C). Follow this same calculation sequence

for the exact application and package selected to predict the maximum TJ.

THS4541 Datasheet(PDF) 32 Page - Texas Instruments

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