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LM4935 Datasheet(PDF) 32 Page - National Semiconductor (TI) |
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LM4935 Datasheet(HTML) 32 Page - National Semiconductor (TI) |
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32 / 112 page  12.0 Status & Control Registers (Continued) 12.11 ADC_2 CONFIGURATION REGISTER This register is used to control the LM4935’s audio ADC. TABLE 12. ADC_2 (0x07h) Bits Field Description 0 ULAW/ALAW If COMPAND is set then the data across the PCM interface to the DAC and from the ADC is companded as follows: ULAW/ALAW Commanding Type 0 µ-law 1 A-law 1 COMPAND If set the 16 bit PCM data from the ADC is companded before the PCM interface and the PCM data to the DAC is treated as companded data. 2 ADC_MUTE If set the analog inputs to the ADC are muted. 5:3 AGC_FRAME_TIME This sets the frame time to be used by the AGC algorithm. In a given frame, the AGC’s peak detector determines the peak value of the incoming microphone audio signal and compares this value to the target value of the AGC defined by AGC_TARGET (bits [3:1] of register (0x08h)) in order to adjust the microphone preamplifiers gain accordingly. AGC_FRAME_TIME basically sets the sample rate of the AGC to adjust for a wide variety of speech patterns. (Note 15) AGC_FRAME_TIME Time (ms) 000 2 96 001 2 128 010 2 192 011 2 256 100 2 384 101 2 512 110 2 768 111 2 1000 6 ADC_I2S_M If set the DAC clock system is enabled to drive the I2S in master mode. The Point B frequency should be double that at Point C. This bit should be set when using the I2S interface in master mode to read SAR information whenever both the audio ADC and DAC are inactive. 7 AUDIO_IF_2_16BIT If set the PCM and I2S interfaces are 16 bits per word in master mode. The 2 last clock cycles per word are 25% shorter to allow generation. Note 15: Refer to the AGC overview for further detail. www.national.com 32 |
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