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PR533 Datasheet(PDF) 16 Page - NXP Semiconductors |
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PR533 Datasheet(HTML) 16 Page - NXP Semiconductors |
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16 / 36 page ![]() PR533_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product short data sheet COMPANY PUBLIC Rev. 3.6 — 27 October 2014 206436 16 of 36 NXP Semiconductors PR533 USB NFC integrated reader solution 10.10 Input/output pin characteristics for P35 [1] To minimize power consumption when in soft power-down mode, the limit is VDDD 0.4 V. [2] To minimize power consumption when in soft power-down mode, the limit is 0.4 V. [3] The IOH and IOL give the output driving capability and allow to calculate directly the rise and fall time as function of the load capacitance. Table 17. Input/output pin characteristics for P35 Symbol Parameter Conditions Min Typ Max Unit VIH HIGH-level input voltage [1] 0.7 V DDD -VDDD V VIL LOW-level input voltage [2] 0- 0.3 V DDD V VOH HIGH-level output volt- age VDDD =3V; IOH = 4mA VDDD 0.4 - VDDD V VOL LOW-level output voltage VDDD =3V; IOL =4mA 0 - 0.4 V IIH HIGH-level input current VI =VDDD 1- 1 A IIL LOW-level input current VI =0V 1- 1 A IOH HIGH-level output current VDDD =3V; VOH =0.8 VDD(PVDD) [3] 4- - mA IOL LOW-level output current VDDD =3V; VOL =0.2 VDD(PVDD) [3] 4- - mA ILI input leakage current RSTPD_N = 0.4 V 1- 1 A Ci input capacitance - 2.5 - pF CL load capacitance - - 30 pF tr rise time VDDD =3V; VOH =0.8 VDDD; CL =30pF -- 13.5 ns VDDD =1.8 V; VOH =0.7 VDDD; CL =30pF -- 10.8 ns tf fall time VDDD =3V; VOL =0.2 VDDD; CL=30pF -- 13.5 ns VDDD =1.8 V; VOL =0.3 VDDD; CL =30pF -- 10.8 ns |
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