PR533 datasheet(14/36 Pages) NXP

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PR533_SDS

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Product short data sheet

COMPANY PUBLIC

Rev. 3.6 — 27 October 2014

206436

14 of 36

NXP Semiconductors

PR533

USB NFC integrated reader solution

10.8 Input/output characteristics for pin P70_IRQ

[1]

To minimize power consumption when in soft power-down mode, the limit is VDD(PVDD)  0.4 V.

[2]

To minimize power consumption when in soft power-down mode, the limit is 0.4 V.

[3]

Data at VDD(PVDD) = 1.8 V are only given from characterization results.

[4]

The IOH and IOL give the output driving capability and allow to calculate directly the rise and fall time as function of the load capacitance.

Table 15.

Input/output pin characteristics for pin P70_IRQ

Symbol Parameter

Conditions

Min

Typ

Max

Unit

VIH

HIGH-level input volt-

age

[1] 0.7

 V

DD(PVDD)

-VDD(PVDD)

VIL

LOW-level input voltage

[2] 0-

0.3

 V

DD(PVDD)

VOH

HIGH-level output volt-

age

push-pull mode;

VDD(PVDD) =3V; IOH = 4mA

0.7

 V

DD(PVDD)

-VDD(PVDD)

push-pull mode;

VDD(PVDD) = 1.8 V; IOH =-2mA

[3] 0.7

 V

DD(PVDD)

-VDD(PVDD)

VOL

LOW-level output volt-

age

push-pull mode;

VDD(PVDD) =3V; IOL =4mA

0.3

 V

DD(PVDD)

push-pull mode;

VDD(PVDD) = 1.8 V; IOL =2mA

[3] 0-

0.3

 V

DD(PVDD)

IIH

HIGH-level input current input mode; VI =VDDD

1-

A

IIL

LOW-level input current input mode; VI =0V

1-

A

IOH

HIGH-level output cur-

rent

VDD(PVDD) =3V;

VOH =0.8  VDD(PVDD)

[5]

4-

IOL

LOW-level output cur-

rent

VDD(PVDD) =3V;

VOL =0.2  VDD(PVDD)

[5] 4-

ILI

input leakage current

RSTPD_N = 0.4 V

1-

A

input capacitance

2.5

load capacitance

rise time

VDD(PVDD) =3V;

VOH =0.8  VDD(PVDD);

CL =30pF

13.5

VDD(PVDD) =1.8 V;

VOH =0.7  VDD(PVDD);

CL =30pF

10.8

fall time

VDD(PVDD) =3V;

VOL =0.2  VDD(PVDD);

CL=30pF

13.5

VDD(PVDD) =1.8 V;

VOL =0.3  VDD(PVDD);

CL =30pF

10.8

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