AD7933 datasheet(20/32 Pages) AD

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AD7933/AD7934

Preliminary Technical Data

0.47

µF

+1.25V

VIN

–1.25V

+2.5V

VIN0

VIN3

VREFOUT

AD7933/

AD7934*

*ADDITIONAL PINS OMITTED FOR CLARITY

Figure 24. THD vs. Analog Input Frequency for Various Source Impedances

Figure 25 shows a graph of the THD versus the analog input

frequency for various supplies, while sampling at 1.5 MHz with

an SCLK of 20 MHz. In this case, the source impedance is 10 Ω.

Figure 25. THD vs. Analog Input Frequency for Various Supply Voltages

ANALOG INPUTS

The AD7933/AD7934 have software selectable analog input

configurations. Users can choose either four single-ended

inputs, two fully differential pairs, or two pseudo-differential

pairs. The analog input configuration is chosen with Bits

MODE0/MODE1 in the internal control register (see

Table 9

Single-Ended Mode

The AD7933/AD7934 can have four single-ended analog input

channels by setting the MODE0 and MODE1 bits in the control

high impedance, it is recommended to buffer the analog input

before applying it to the ADC. The analog input range is either 0

to VREF or 0 to 2 × VREF.

If the analog input signal to be sampled is bipolar, the internal

reference of the ADC can be used to externally bias up this

signal to make it of the correct format for the ADC.

Figure 26

Figure 26. Single-Ended Mode Connection Diagram

Differential Mode

The AD7933/AD7934 can have two differential analog input

pairs by setting Bits MODE0 and MODE1 in the control

Differential signals have some benefits over single-ended

signals, including noise immunity based on the device’s

common-mode rejection and improvements in distortion

performance. F

defines the fully differential analog

input of the AD7933/AD7934.

igure 27

Figure 27. Differential Input Definition

VREF

p-p

VIN+

VIN–

VREF

p-p

*ADDITIONAL PINS OMITTED FOR CLARITY

AD7933/

AD7934*

COMMON-MODE

VOLTAGE

The amplitude of the differential signal is the difference

between the signals applied to the VIN+ and VIN− pins in each

differential pair (i.e., VIN+ − VIN−). VIN+ and VIN− should be

simultaneously driven by two signals, each of amplitude VREF

that are 180° out of phase. The amplitude of the differential

signal is therefore −VREF to +VREF peak-to-peak (i.e., 2 × VREF).

This is regardless of the common mode (CM). The common

mode is the average of the two signals, i.e. (VIN+ + VIN−)/2, and is

therefore the voltage that the two inputs are centered on. This

results in the span of each input being CM ± VREF/2. This

voltage has to be set up externally and its range varies with VREF.

As the value of VREF increases, the common-mode range

decreases. When driving the inputs with an amplifier, the actual

common-mode range is determined by the amplifier’s output

voltage swing.

Figure 28 and Figure 29 show how the common-mode range

typically varies with VREF for both a 5 V and a 3 V power supply.

The common mode must be in this range to guarantee the

functionality of the AD7933/AD7934.

shows a typical connection diagram when operating

the ADC in single-ended mode.

Rev. PrG | Page 20 of 32

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