AMC7823 datasheet(23/48 Pages) TI

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ADC OPERATION (See AMC Status/Configuration Register and ADC Control Register)

ADC−0

TMPRY

ADC−0

DATA

ADC

CH0

CH3

CH7

MUX

Double-Buffered

ADC Data Register

After conversion of CH- finished,

ADC- TMPRY register is updated

immediately.

TMPRY register is a temporary register

All ADC- DA

TA registers are

updated simultaneously when the

conversion of the last channel

selected is completed. (1)

CMOD of ADC Control Register defines

conversion mode.

For Direct-Mode (CMOD = 0), each channel

being converted is accessed one time after

triggered.

For Auto-Mode (CMOD = 1), all channels

being converted are accessed repeatedly

after triggered.

External trigger works in Direct-Mode only.

Bit ECNVT of AMC Status and Configuration Register

selects the trigger signal.

ECNVT = 1, Rising Edge of External CONVERT triggers ADC

ECNVT = 0, Writing ADC Control Register triggers ADC

Bit DAVF, Pin DAV

Bit DAVF and Pin

indicate new data available.

DAV

ADC−6

TMPRY

ADC−6

DATA

Out-of-Range Alarm of

first four inputs being

converted

CONVERT, External

Internal Trigger generated by

Writing ADC Control Register

Bit ECNVT

Bit GREF, effective for

Internal Reference only (2)

To Shifter

To Shift

ADC−7

TMPRY

ADC−7

DATA

ADC−8

TMPRY

ADC−8

DATA

CH8

(temperature)

Out-of-Range

ALARM

After ADC- Data are Updated, DA

VF is set to ‘1’.

Goes Low (Direct-Mode) or Sends 2 s

DAV

Pulse (Auto-Mode). Refer to Figure 42, Figure 43 and

Figure 44.

ADC Trigger Signals (see AMC Status/Configuration Register)

AMC7823

SLAS453A – APRIL 2005 – REVISED OCTOBER 2005

(1)

To avoid conflict, the data is not loaded into ADC-n data register from ADC-n temporary register until the data transfer

from the ADC-n data register to the shift register (if any) finishes.

(2)

When the internal reference is selected, the bit GREF determines the input range: GREF = 0, 0 to 2.5 V; GREF = 1, 0

to 5 V (for 5-V supply only). When an external reference is selected, the input range is 0 to 2 × VREF. The input

cannot be above AVDD.

Figure 41. ADC Structure

The ADC has nine analog inputs. Channels CH0 through CH7 receive external analog inputs. CH8 is dedicated

to the on-chip temperature sensor (see On-chip Temperature Sensor section).

The ADC can be triggered externally (external trigger mode) or internally (internal trigger mode). Bit ECNVT

(Enable CONVERT) of the AMC Status/Configuration Register determines which mode is used. When ECNVT is

set to '1', the ADC works in external trigger mode and the rising edge of the external signal CONVERT initiates

data conversion. When ECNVT is cleared to '0', the ADC is in internal trigger mode, and writing to the ADC

Control Register initiates conversion.

After the ADC is triggered, a group of analog inputs (up to nine channels may be specified) are multiplexed and

each channel is converted. The starting and ending addresses of the group of channels are specified by the bits

[SA3:SA0] and [EA3:EA0], respectively, in the ADC Control Register (see ADC Control Register for details). The

specified channels are converted sequentially from the starting to ending address, according to Table 12, the

Analog Input Channel Address Map. If the ending address is equal to or smaller than the starting address, only

the starting address channel is converted.

AMC7823 Datasheet(PDF) 23 Page - Texas Instruments

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