AMC7823 datasheet(25/48 Pages) TI

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WRITE ADC

CONTROL Register

WRITE ADC

CONTROL Register

1st Internal

Trigger

2nd Internal

Trigger

1st Conversions,

[SA3:SA0] to [EA3:EA0]

2nd Conversions,

[SA3:SA0] to [EA3:EA0]

MOSI

DAV

1st Round of

Conversions,

[SA3:SA0] to [EA3:EA0]

Internal Trigger

WRITE ADC

CONTROL Register

2nd Round of

Conversions,

[SA3:SA0] to [EA3:EA0]

MOSI

DAV

2 s

1st Trigger

1st Conversions, of

Analog Inputs, From

[SA3:SA0] to [EA3:EA0]

2nd Conversions,

[SA3:SA0] to [EA3:EA0]

Rising Edge

Starts Conversions

2nd Trigger

3rd Trigger

3rd Conversions,

[SA3:SA0] to [EA3:EA0]

CONVERT

DAV

Analog Input Out-of-Range Detection (see Analog Input Out-of-Range Alarm Section)

Full-Scale Range of Analog Input

AMC7823

SLAS453A – APRIL 2005 – REVISED OCTOBER 2005

Figure 42. Internal Trigger, Direct-Mode

Figure 43. Internal Trigger, Auto-Mode

Figure 44. External Trigger

The first four analog inputs of the group defined by the bits [SA3:SA0] and [EA3:EA0] are implemented with

out-of-range detection. When an input is out of the preset range, the corresponding alarm flag, bit ALR-n of the

ALR (Alarm) Register is set. If any of the four inputs are out of range, the global out-of-range pin GALR goes low.

Four GPIO pins (GPIO-0, GPIO-1, GPIO-2 and GPIO-3) can be configured as out-of-range indicators for each of

the first four analog inputs. See the Analog Input Out-of-Range Alarm and Digital I/O sections for more details.

The full-scale range of the analog input is 2 × VREF, but must not exceed the supply value AVDD. Input saturation

can occur if the analog input exceeds this value.

The internal reference or an externally applied reference may be used as VREF. The bit SREF in the AMC

Status/Configuration Register controls the selection of the internal reference. When SREF = 0 (power-up default

condition), the internal reference is selected and is internally applied through a 10-k

Ω resistor to pin 21. When

SREF = 1, the internal reference is disconnected from pin 21, and an external reference may be applied. See

Figure 48.

Table 4 shows the configuration of the ADC input range.

Table 4. Configuration of ADC Input Range

BIT

ADC INPUT

GREF

SREF

RANGE

DESCRIPTION

0 to 2.5 V

Internal reference, 1.25 V

0 to 5 V

Internal reference, 2.5 V, AVDD = 5 V only

Don't

External reference VREF. 2 × VREF must not be greater than AVDD.

0 to 2 × VREF

care

Set SREF = 1 when applying external reference.

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