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W5100 Datasheet(PDF) 63 Page - WIZnet Co., Ltd |
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W5100 Datasheet(HTML) 63 Page - WIZnet Co., Ltd |
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63 / 72 page ![]() © Copyright 2009-2011 WIZnet Co., Inc. All rights reserved. 62 6.3.1 Device Operations The W5100 is controlled by a set of instruction that is sent from a host controller, commonly referred to as the SPI Master. The SPI Master communicates with W5100 via the SPI bus which is composed of four signal lines: Slave Select(/SS), Serial Clock(SCLK), MOSI(Master Out Slave In), MISO(Master In Slave Out). The SPI protocol defines four modes for its operation (Mode 0, 1, 2, 3). Each mode differs according to the SCLK polarity and phase - how the polarity and phase control the flow of data on the SPI bus. The W5100 operates as SPI Slave device and supports the most common mode - SPI Mode 0. With SPI Mode 0, data is always latched in on the rising edge of SCLK and always output on the falling edge of SCLK. 6.3.2 Commands According to SPI protocol, there are only two data lines used between SPI devices. So, it is necessary to define OP-Code. W5100 uses two types of OP-Code - Read OP-Code and Write OP-Code. Except for those two OP-Codes, W5100 will be ignored and no operation will be started. In SPI Mode, W5100 operates in “unit of 32-bit stream”. The unit of 32-bit stream is composed of 1 byte OP-Code Field, 2 bytes Address Field and 1 byte data Field. OP-Code, Address and data bytes are transferred with the most significant bit(MSB) first and least significant bit(LSB) last. In other words, the first bit of SPI data is MSB of OP-Code Field and the last bit of SPI data is LSB of Data-Field. W5100 SPI data format is as below. Command OP-Code Field Address Field Data Field Write operation 0xF0 1111 0000 2 bytes 1 byte Read operation 0x0F 0000 1111 2 bytes 1 byte |
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