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W5100 Datasheet(PDF) 25 Page - WIZnet Co., Ltd |
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W5100 Datasheet(HTML) 25 Page - WIZnet Co., Ltd |
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25 / 72 page ![]() © Copyright 2009-2011 WIZnet Co., Inc. All rights reserved. 24 RCR (Retry Count Register) [R/W] [0x0019] [0x08] This register sets the number of re-transmission. If retransmission occurs more than the number recorded in RCR, Timeout Interrupt (TIMEOUT bit of Socket n Interrupt Register (Sn_IR) is set as ‘1’) will occur. RMSR(RX Memory Size Register) [R/W] [0x001A] [0x55] This register assigns total 8K RX Memory to each socket. 7 6 5 4 3 2 1 0 Socket 3 Socket 2 Socket 1 Socket 0 S1 S0 S1 S0 S1 S0 S1 S0 The memory size according to the configuration of S1, S0, is as below. S1 S0 Memory size 0 0 1KB 0 1 2KB 1 0 4KB 1 1 8KB According to the value of S1 and S0, the memory is assigned to the sockets from socket 0 within the range of 8KB. If there is not enough memory to be assigned, the socket should not be used. The initial value is 0x55 and the 2K memory is assigned to each 4 sockets respectively. Ex) When setting as 0xAA, the 4KB memory should be assigned to each socket. However, the total memory size is 8KB. The memory is normally assigned to the socket 0 and 1, but not to the socket 2 and 3. Therefore, socket 2 and 3 can not be absolutely used. Socket 3 Socket 2 Socket 1 Socket 0 0KB 0KB 4KB 4KB TMSR(TX Memory Size Register) [R/W] [0x001B] [0x55] This register is used in assigning total 8K TX Memory to sockets. Configuration can be done in the same way of RX Memory Size Register (RMSR). The initial value is 0x55 and it is to assign 2K memory to 4 sockets respectively. |
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