W5100 datasheet(23/72 Pages) WIZNET

23 / 72 page

IR (Interrupt Register) [R] [0x0015] [0x00]

This register is accessed by the host processor to know the cause of an interrupt.

Any interrupt can be masked in the Interrupt Mask Register (IMR). The /INT signal retain low

as long as any masked signal is set, and will not go high until all masked bits in this Register

have been cleared.

CONFLICT

UNREACH

PPPoE

Reserved

S3_INT

S2_INT

S1_INT

S0_INT

Bit

Symbol

Description

CONFLICT

IP Conflict

It is set as ‘1’, when there is ARP request with same IP address as Source IP

address. This bit is cleared to ‘0’ by writing ‘1’ to this bit.

UNREACH

Destination unreachable

W5100 will receive ICMP(Destination Unreachable) packet if non-existing

destination IP address is transmitted during UDP data transmission. (Refer

to “5.2.2 UDP”). In this case, the IP address and the port number will be

saved in Unreachable IP Address (UIPR) and Unreachable Port Register

(UPORT), and the bit will be set as ‘1’. This bit will be cleared to ‘0’ by

writing ‘1’ to this bit.

PPPoE

PPPoE Connection Close

In the PPPoE Mode, if the PPPoE connection is closed, ‘1’ is set. This bit

will be cleared to ‘0’ by writing ‘1’ to this bit.

Reserved

S3_INT

Occurrence of Socket 3 Socket Interrupt

It is set in case that interrupt occurs at the socket 3. For more detailed

information of socket interrupt, refer to “Socket 3 Interrupt Register

(S3_IR)”. This bit will be automatically cleared when S3_IR is cleared to

0x00.

S2_INT

Occurrence of Socket 2 Socket Interrupt

It is set in case that interrupt occurs at the socket 2. For more detailed

information

socket

interrupt,

refer

“Socket

Interrupt

cleared to 0x00.

S1_INT

Occurrence of Socket 1 Socket Interrupt

It is set in case that interrupt occurs at the socket 1. For more detailed

information of socket interrupt, refer to “Socket 1 Interrupt Register

W5100 Datasheet(PDF) 23 Page - WIZnet Co., Ltd

W5100 Datasheet(HTML) 23 Page - WIZnet Co., Ltd

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Datasheet Download

Link URL