LTC3370 datasheet(12/26 Pages) AD

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LTC3307A

Rev. A

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OPERATION

Synchronizing the Oscillator to an External Clock

The LTC3307A’s internal oscillator can be synchronized

through an internal PLL circuit to an external frequency

by applying a square wave clock signal to the MODE/

SYNC pin.

During synchronization, the top power switch turn-on is

locked to the rising edge of the external frequency source.

While synchronizing, the switcher operates in forced con-

tinuous mode. The slope compensation is automatically

adapted to the external clock frequency. The synchroniza-

tion frequency range is 1MHz to 3MHz.

After detecting an external clock on the first rising edge

of the MODE/SYNC pin, the internal PLL gradually adjusts

its operating frequency to match the frequency and phase

of the signal on the MODE/SYNC pin. When the external

clock is removed, the LTC3307A will detect the absence

of the external clock within approximately 10μs. During

this time, the PLL will continue to provide clock cycles.

Once the external clock removal has been detected, the

oscillator will gradually adjust its operating frequency to

the one programmed by the RT pin.

Output Power Good

When the LTC3307A’s output voltage is within the

–2%/+10% window of the nominal regulation voltage the

output is considered good and the open-drain PGOOD pin

goes high impedance and is typically pulled high with an

external resistor. Otherwise, the internal pull-down device

will pull the PGOOD pin low. The PGOOD pin is also pulled

low during the following fault conditions: EN pin is low,

VIN is too low or thermal shutdown. To filter noise and

short duration output voltage transients, the lower thresh-

old has a hysteresis of 1.2%, the upper threshold has a

hysteresis of 2%, and both have a built-in time delay to

report PGOOD, typically 120µs.

Output Overvoltage Protection

During an output overvoltage event, when the FB pin volt-

age is greater than 110% of nominal, the LTC3307A top

power switch will be turned off. If the output remains out

of regulation for more than 120µs, the PGOOD pin will

be pulled low.

An output overvoltage event should not happen under

normal operating conditions.

Overtemperature Protection

To prevent thermal damage to the LTC3307A and its sur-

rounding components, the device incorporates an over-

temperature (OT) function. When the die temperature

reaches 165°C (typical, not tested) the switcher is shut

down and remains in shutdown until the die temperature

falls to 160°C (typical, not tested).

Output Voltage Soft-Start

Soft starting the output prevents current surge on the

input supply and/or output voltage overshoot. During the

soft-start, the output voltage will proportionally track the

internal node voltage ramp. An active pull-down circuit

discharges that internal node in the case of fault condi-

tions. The ramp will restart when the fault is cleared. Fault

conditions that initiate the soft-start ramp are the EN pin

transitioning low, VIN voltage falling too low, or thermal

shutdown.

Dropout Operation

As the input supply voltage approaches the output volt-

age, the duty cycle increases toward 100%. Further reduc-

tion of the supply voltage forces the main switch to remain

on for more than one cycle, eventually reaching 100%

duty cycle. The output voltage will then be determined by

the input voltage minus the DC voltage drop across the

internal P-channel MOSFET and the inductor.

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