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F0480 Datasheet(PDF) 9 Page - Renesas Technology Corp |
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F0480 Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 28 page ![]() Matched Broadband RF VGA 400MHz to 2700MHz Glitch-Free TM, Zero-DistortionTM, RF VGA 9 Rev 3, April 2015 IDTF0480NBGI Datasheet F0480 DVGA ATTENUATION WORD TRUTH TABLE (LSB = first in) The SPI interface should be built up by an 8-bit word (defined as MOSI) where 5 bits are used for attenuation setting per the example shown below. BOLD indicates bits used for programming the attenuator; data bits 2 through 6. D7 (MSB) D6 D5 D4 D3 D2 D1 D0 (LSB) ATTENUATION SETTING x Low Low Low Low Low x x insertion loss x Low Low Low Low High x x 1 dB x Low Low Low High Low x x 2 dB x Low Low High Low Low x x 4 dB x Low High Low Low Low x x 8 dB x High Low Low Low Low x x 16 dB x High Low High High Low x x 22 dB x High Low High High High x x 23 dB (max) x High High Low Low Low x x 23 dB (max) x High High Low Low High x x 23 dB (max) x High High Low High Low x x 23 dB (max) x High High Low High High x x 23 dB (max) x High High High Low Low x x 23 dB (max) x High High High Low High x x 23 dB (max) x High High High High Low x x 23 dB (max) x High High High High High x x 23 dB (max) STANDBY TRUTH TABLE* PARAMETER LEVEL FUNCTION STBY 0 Volts or Open Circuit Power On +5 Volts Power Off * Startup/Power on requirements: SPI shall be left on during Standby mode. When the circuit is initially powered up (+5V applied on pin 12/13), the default VGA setting should be minimum gain (max attenuation setting). If the attenuator is programmed in Standby mode, the programmed setting will be active when the device is taken out of Standby mode. SPI LOGIC LEVEL CONTROL - PIN 11 PARAMETER LEVEL FUNCTION LogicCTL 3.3 Volts or open Circuit 3.3V logic 0 Volts 1.8V logic |
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