AT90PWM2 datasheet(165/365 Pages) ATMEL

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165

AT90PWM2/3

4317A-3–AVR–02/05

PSC Synchronization

2 or 3 PSC can be started at the same time by a chained mechanism.

Figure 92. PSC Run Synchronization

If the PSCm has its PARUNn bit set, then it can start at the same time than PSCn-1.

PRUNn and PARUNn bits are located PCTLn register. See page 174.

Note : Do not set the PARUNn bits on the three PSC at the same time.

Thanks to this feature, we can for example configure two PSC in slave mode (PARUNn

= 1 / PRUNn = 0) and one PSC in master mode (PARUNm = 0 / PRUNm = 0). This PSC

master can start all PSC at the same moment ( PRUNm = 1).

Fault events in Autorun mode

To complete this master/slave mechanism, fault events are propagated from PSCn-1 to

PSCn and from PSCn to PSCn-1.

A PSC which propagate a Run signal to the following PSC stops this PSC when the Run

signal is deactivate.

A PSC which receive its Run signal from the previous PSC transmits its fault signal (if

enabled) to this previous PSC. So a slave PSC propagates its fault events when they

are configured and enabled.

PSC Clock Sources

PSC must be able to generate high frequency with enhanced resolution.

Each PSC has two clock inputs:

•

CLK PLL from the PLL

•

CLK I/O

PARUN0

PRUN0

Run PSC0

PSC0

PARUN1

PRUN1

Run PSC1

PSC1

PARUN2

PRUN2

Run PSC2

PSC2

SY0Out

SY0In

SY1In

SY2In

SY1Out

SY2Out

AT90PWM2 Datasheet(PDF) 165 Page - ATMEL Corporation

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